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中国科学院计算技术研究所机构知识库
Institute of Computing Technology, Chinese Academy IR
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FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer
期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024, 页码: 13
作者:
Jiao, Bo
;
Xu, Lei
;
Yu, Xinyu
;
Yang, Haitao
;
Zhu, Haozhe
;
Wang, Yu
;
Zhu, Jundong
;
Wen, Dexin
;
Wang, Lingli
;
Tao, Jun
;
Chen, Chixiao
;
Han, Yinhe
;
Liu, Qi
;
Sun, Ninghui
;
Liu, Ming
收藏
  |  
浏览/下载:1/0
  |  
提交时间:2024/12/06
Chiplet integration
silicon interposer
placement
routing
communication-aware
A New Reconfigurable True Random Number Generator and Physical Unclonable Function Unified Chip With On-Chip Auto-Calibration
期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2023, 页码: 14
作者:
Cao, Yuan
;
Liu, Wanyi
;
Zheng, Yue
;
Chen, Shuai
;
Ye, Jing
;
Qian, Lei
;
Chang, Chip-Hong
收藏
  |  
浏览/下载:17/0
  |  
提交时间:2023/12/04
Entropy
Authentication
System-on-chip
Protocols
Jitter
Computer architecture
Rail to rail outputs
True random number generator
physical unclonable function
current-starved ring oscillator
Design of a Compact Superconducting RSFQ Register File
期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2023, 页码: 8
作者:
Zhang, Kuozhong
;
Zhang, Zhimin
;
Tang, Guangming
;
Ye, Xiaochun
收藏
  |  
浏览/下载:17/0
  |  
提交时间:2023/12/04
Registers
Clocks
Josephson junctions
Power transmission lines
Logic gates
Decoding
Program processors
RSFQ
register file
superconducting digital circuit
Fault Modeling and Efficient Testing of Memristor-Based Memory
期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2021, 卷号: 68, 期号: 11, 页码: 4444-4455
作者:
Liu, Peng
;
You, Zhiqiang
;
Wu, Jigang
;
Liu, Bosheng
;
Han, Yinhe
;
Chakrabarty, Krishnendu
收藏
  |  
浏览/下载:33/0
  |  
提交时间:2022/06/21
Electrical defects
fault model
defect-oriented testing
March algorithm
non-volatile memory
An Efficient Full Hardware Implementation of Extended Merkle Signature Scheme
期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2021, 页码: 12
作者:
Cao, Yuan
;
Wu, Yanze
;
Wang, Wen
;
Lu, Xu
;
Chen, Shuai
;
Ye, Jing
;
Chang, Chip-Hong
收藏
  |  
浏览/下载:32/0
  |  
提交时间:2022/06/21
Hardware
Random access memory
Software algorithms
Quantum computing
Field programmable gate arrays
Computers
NIST
Post-quantum cryptography
eXtended Merkle signature scheme
hardware accelerator
Field-Free 3T2SOT MRAM for Non-Volatile Cache Memories
期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 卷号: 67, 期号: 12, 页码: 4660-4669
作者:
Wu, Bi
;
Wang, Chao
;
Wang, Zhaohao
;
Wang, Ying
;
Zhang, Deming
;
Liu, Dijun
;
Zhang, Youguang
;
Hu, Xiaobo Sharon
收藏
  |  
浏览/下载:47/0
  |  
提交时间:2021/12/01
Random access memory
Magnetic tunneling
Switches
Reliability
Tunneling magnetoresistance
Metals
Transistors
SOT-MRAM
low power
high speed
high reliability
Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy
期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 卷号: 67, 期号: 1, 页码: 108-120
作者:
Wu, Bi
;
Dai, Pengcheng
;
Wang, Zhaohao
;
Wang, Chao
;
Wang, Ying
;
Yang, Jianlei
;
Cheng, Yuanqing
;
Liu, Dijun
;
Zhang, Youguang
;
Zhao, Weisheng
;
Hu, Xiaobo Sharon
收藏
  |  
浏览/下载:58/0
  |  
提交时间:2020/12/10
NAND-SPIN
spin orbit torque (SOT) MRAM
last level cache
write throughput
high performance
Power and Area Efficient FPGA Building Blocks Based on Ferroelectric FETs
期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019, 卷号: 66, 期号: 5, 页码: 1780-1793
作者:
Chen, Xiaoming
;
Ni, Kai
;
Niemier, Michael T.
;
Han, Yinhe
;
Datta, Suman
;
Hu, Xiaobo Sharon
收藏
  |  
浏览/下载:91/0
  |  
提交时间:2019/08/16
Ferroelectric field-effect transistor (FeFET)
field-programmable gate array (FPGA)
lookup table (LUT)
routing switch
Sinusoidal Clock Sampling for Multigigahertz ADCs
期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2011, 卷号: 58, 期号: 12, 页码: 2808-2815
作者:
Bai, Rui
;
Wang, Jingguang
;
Xia, Lingli
;
Zhang, Feng
;
Yang, Zongren
;
Hu, Weiwu
;
Chiang, Patrick
收藏
  |  
浏览/下载:74/0
  |  
提交时间:2019/12/16
Flash ADC
jitter
SFDR
sinusoidal clock