Fault Modeling and Efficient Testing of Memristor-Based Memory

doi:10.1109/TCSI.2021.3098639

	Fault Modeling and Efficient Testing of Memristor-Based Memory
	Liu, Peng 1; You, Zhiqiang 2; Wu, Jigang 1; Liu, Bosheng 1; Han, Yinhe 3; Chakrabarty, Krishnendu 4
	2021-11-01
发表期刊	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
ISSN	1549-8328
卷号	68 期号:11 页码:4444-4455
摘要	Memristor-based memory technology is one of the emerging memory technologies, which is a potential candidate to replace traditional memories. Efficient test solutions are required to enable the quality and reliability of such products. In previous works, fault models are caused by open, short and bridge defects and parametric variations during the fabrication. However, these fault models cannot describe the bridge defects that cause the state of the faulty cell to an undefined state. In this paper, we analyze the different effects of bridge defects and aggregate their faulty behavior into new fault models, undefined coupling fault and dynamic undefined coupling fault. In addition, an enhanced March algorithm is designed to detect all the modeled faults. In one resistor crossbar with N memristors, the enhanced March algorithm requires 8N write and 7N read operations with negligible hardware overhead. To reduce the test time, a March RC algorithm is proposed based on read operations with new reference currents, which requires 4N + 2 write and 6N read operations. Analytical results show that the proposed test algorithms can detect all the modeled faults outperforming all the previous methods. Subsequently, a Design-for-Testability scheme is proposed to implement March RC algorithm with a little area overhead.
关键词	Electrical defects fault model defect-oriented testing March algorithm non-volatile memory
DOI	10.1109/TCSI.2021.3098639
收录类别	SCI
语种	英语
资助项目	State Key Laboratory of Computer Architecture (ICT, CAS), China[CARCH201907] ; Guangdong Basic and Applied Basic Research Foundation[2019A1515110284] ; Guangdong Basic and Applied Basic Research Foundation[2021A1515011962] ; National Key Research and Development Program of China[2018YFB1003201] ; National Natural Science Foundation of China[62074055] ; National Natural Science Foundation of China[62072118] ; Major Research Plan of the National Natural Science Foundation of China[91964108] ; Guangdong Natural Science Foundation[2018B030311007] ; Guangdong Key Research and Development Project of China[2016KZDXM052] ; Guangdong Key Research and Development Project of China[2018B010107003] ; Guangdong Key Research and Development Project of China[2019B010118001]
WOS研究方向	Engineering
WOS类目	Engineering, Electrical & Electronic
WOS记录号	WOS:000716698600007
出版者	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
引用统计	被引频次：17[WOS] [WOS记录] [WOS相关记录]
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/17898
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	You, Zhiqiang; Wu, Jigang
作者单位	1.Guangdong Univ Technol, Sch Comp, Guangzhou 510006, Peoples R China 2.Hunan Univ, Coll Comp Sci & Elect Engn, Key Lab Embedded & Network Comp Hunan Prov, Changsha 410082, Hunan, Peoples R China 3.Chinese Acad Sci, Inst Comp Technol, Key Lab Comp Syst & Architecture, Beijing 100190, Peoples R China 4.Duke Univ, Dept Elect & Comp Engn, Durham, NC 27708 USA
推荐引用方式 GB/T 7714	Liu, Peng,You, Zhiqiang,Wu, Jigang,et al. Fault Modeling and Efficient Testing of Memristor-Based Memory[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS,2021,68(11):4444-4455.
APA	Liu, Peng,You, Zhiqiang,Wu, Jigang,Liu, Bosheng,Han, Yinhe,&Chakrabarty, Krishnendu.(2021).Fault Modeling and Efficient Testing of Memristor-Based Memory.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS,68(11),4444-4455.
MLA	Liu, Peng,et al."Fault Modeling and Efficient Testing of Memristor-Based Memory".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 68.11(2021):4444-4455.