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In-Memory Wallace Tree Multipliers Based on Majority Gates Within Voltage-Gated SOT-MRAM Crossbar Arrays 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2024, 页码: 8
作者:  Hui, Yajuan;  Li, Qingzhen;  Wang, Leimin;  Liu, Cheng;  Zhang, Deming;  Miao, Xiangshui
收藏  |  浏览/下载：4/0  |  提交时间：2024/05/20
In-memory computing  majority gates  voltage-gated SOT-MRAM  Wallace tree multiplier  
Exploring Winograd Convolution for Cost-Effective Neural Network Fault Tolerance 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2023, 卷号: 31, 期号: 11, 页码: 1763-1773
作者:  Xue, Xinghua;  Liu, Cheng;  Liu, Bo;  Huang, Haitong;  Wang, Ying;  Luo, Tao;  Zhang, Lei;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：2/0  |  提交时间：2024/05/20
Fault tolerant systems  Fault tolerance  Artificial neural networks  Convolution  Reliability  Computational modeling  Neurons  Fault-tolerance  soft errors  vulnerability analysis  winograd convolution (WG-Conv)  
Soft Error Reliability Analysis of Vision Transformers 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2023, 页码: 11
作者:  Xue, Xinghua;  Liu, Cheng;  Wang, Ying;  Yang, Bing;  Luo, Tao;  Zhang, Lei;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：7/0  |  提交时间：2023/12/04
ABFT  fault-tolerance  soft errors  vision transformers (ViTs)  vulnerability analysis  
Taming Process Variations in CNFET for Efficient Last-Level Cache Design 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2022, 卷号: 30, 期号: 4, 页码: 418-431
作者:  Xu, Dawen;  Feng, Zhuangyu;  Liu, Cheng;  Li, Li;  Wang, Ying;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：25/0  |  提交时间：2022/12/07
CNTFETs  Delays  Transistors  Layout  Very large scale integration  Radio frequency  Energy consumption  nanotube field-effect transistor (CNFET)  last-level cache (LLC)  process variation (PV)  variation-aware cache  
Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2021, 卷号: 29, 期号: 3, 页码: 472-484
作者:  Xu, Dawen;  Zhu, Ziyang;  Liu, Cheng;  Wang, Ying;  Zhao, Shuang;  Zhang, Lei;  Liang, Huaguo;  Li, Huawei;  Cheng, Kwang-Ting
收藏  |  浏览/下载：38/0  |  提交时间：2021/12/01
Neural networks  Circuit faults  Hardware  Acceleration  Reliability  Analytical models  Computational modeling  Integrated circuit reliability  reliability  
An Adaptive Thermal-Aware ECC Scheme for Reliable STT-MRAM LLC Design 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2019, 卷号: 27, 期号: 8, 页码: 1851-1860
作者:  Wu, Bi;  Zhang, Beibei;  Cheng, Yuanqing;  Wang, Ying;  Liu, Dijun;  Zhao, Weisheng
收藏  |  浏览/下载：77/0  |  提交时间：2019/12/10
Error correction code (ECC)  last level cache (LLC)  reliability  spin-transfer-torque magnetoresistive random-access memory (STT-MRAM)  temperature  
STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 4, 页码: 1285-1296
作者:  Song, Lili;  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Cheng, Yuanqing;  Li, Xiaowei
收藏  |  浏览/下载：70/0  |  提交时间：2019/12/12
Approximate computing  machine learning  neural network  spin toque transfer RAM (STT-RAM)  
PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 5, 页码: 1613-1625
作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Zhang, Lei;  Cheng, Yuanqing;  Li, Xiaowei
收藏  |  浏览/下载：53/0  |  提交时间：2019/12/13
3-D integration  IR-drop  phase-change memory (PCM)  through-silicon-via (TSV)  write throughput