Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System

doi:10.1109/TVLSI.2020.3046075

	Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System
	Xu, Dawen 1,2; Zhu, Ziyang 1,2; Liu, Cheng 2; Wang, Ying 2; Zhao, Shuang 2; Zhang, Lei 2; Liang, Huaguo 1; Li, Huawei 2; Cheng, Kwang-Ting 3
	2021-03-01
发表期刊	IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
ISSN	1063-8210
卷号	29 期号:3 页码:472-484
摘要	Prior works typically conducted the fault analysis of neural network accelerator computing arrays with simulation and focused on the prediction accuracy loss of the neural network models. There is still a lack of systematic fault analysis of the neural network acceleration system that considers both the accuracy degradation and system exceptions, such as system stall and running overtime. To that end, we implemented a representative neural network accelerator and corresponding fault injection modules on a Xilinx ARM-FPGA platform and evaluated the reliability of the system under different fault injection rates when a series of typical neural network models are deployed on the neural network acceleration system. The entire fault injection and reliability evaluation system is open-sourced on GitHub. With comprehensive experiments on the system, we identify the system exceptions based on the various abnormal behaviors of the FPGA-based neural network acceleration system and analyze the underlying reasons. Particularly, we find that the probability of the system exceptions dominates the reliability of the system. The faults also incur accuracy degradation of the neural network models, but the influence depends on the applications of the models and can vary greatly. In addition, we also evaluated the use of conventional triple modular redundancy (TMR) and demonstrated the challenge of TMR with both experiments and analytical models, which may shed light on the reliability design of the FPGA-based neural network acceleration system.
关键词	Neural networks Circuit faults Hardware Acceleration Reliability Analytical models Computational modeling Integrated circuit reliability reliability
DOI	10.1109/TVLSI.2020.3046075
收录类别	SCI
语种	英语
资助项目	National Natural Science Foundation of China[61874124] ; National Natural Science Foundation of China[61902375] ; National Natural Science Foundation of China[61674048] ; National Natural Science Foundation of China[61834006] ; Strategic Priority Research Program of the Chinese Academy of Sciences[XDC05030201]
WOS研究方向	Computer Science ; Engineering
WOS类目	Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS记录号	WOS:000622096700003
出版者	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
引用统计	被引频次：20[WOS] [WOS记录] [WOS相关记录]
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/16868
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Liu, Cheng
作者单位	1.Hefei Univ Technol, Sch Elect Sci & Appl Phys, Hefei 230009, Peoples R China 2.Chinese Acad Sci, Inst Comp Technol, Beijing 100190, Peoples R China 3.Hong Kong Univ Sci & Technol, Dept Comp Sci & Engn, Hong Kong, Peoples R China
推荐引用方式 GB/T 7714	Xu, Dawen,Zhu, Ziyang,Liu, Cheng,et al. Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,2021,29(3):472-484.
APA	Xu, Dawen.,Zhu, Ziyang.,Liu, Cheng.,Wang, Ying.,Zhao, Shuang.,...&Cheng, Kwang-Ting.(2021).Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System.IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,29(3),472-484.
MLA	Xu, Dawen,et al."Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System".IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 29.3(2021):472-484.