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MRFI: An Open-Source Multiresolution Fault Injection Framework for Neural Network Processing 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2024, 页码: 11
作者:  Huang, Haitong;  Liu, Cheng;  Xue, Xinghua;  Liu, Bo;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：3/0  |  提交时间：2024/05/20
Biological neural networks  Hardware  Reliability  Computational modeling  Neural networks  Fault tolerant systems  Fault tolerance  Fault evaluation  fault injection  fault simulation  multiresolution  neural network reliability  
Exploring Winograd Convolution for Cost-Effective Neural Network Fault Tolerance 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2023, 卷号: 31, 期号: 11, 页码: 1763-1773
作者:  Xue, Xinghua;  Liu, Cheng;  Liu, Bo;  Huang, Haitong;  Wang, Ying;  Luo, Tao;  Zhang, Lei;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：2/0  |  提交时间：2024/05/20
Fault tolerant systems  Fault tolerance  Artificial neural networks  Convolution  Reliability  Computational modeling  Neurons  Fault-tolerance  soft errors  vulnerability analysis  winograd convolution (WG-Conv)  
Taming Process Variations in CNFET for Efficient Last-Level Cache Design 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2022, 卷号: 30, 期号: 4, 页码: 418-431
作者:  Xu, Dawen;  Feng, Zhuangyu;  Liu, Cheng;  Li, Li;  Wang, Ying;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：26/0  |  提交时间：2022/12/07
CNTFETs  Delays  Transistors  Layout  Very large scale integration  Radio frequency  Energy consumption  nanotube field-effect transistor (CNFET)  last-level cache (LLC)  process variation (PV)  variation-aware cache  
LMDet: A "Naturalness" Statistical Method for Hardware Trojan Detection 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018, 卷号: 26, 期号: 4, 页码: 720-732
作者:  Shen, Haihua;  Tan, Huazhe;  Li, Huawei;  Zhang, Feng;  Li, Xiaowei
收藏  |  浏览/下载：53/0  |  提交时间：2019/12/10
Hardware Trojan (HT) detection  natural language processing (NLP)  n-gram language model  statistical analysis  
STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 4, 页码: 1285-1296
作者:  Song, Lili;  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Cheng, Yuanqing;  Li, Xiaowei
收藏  |  浏览/下载：70/0  |  提交时间：2019/12/12
Approximate computing  machine learning  neural network  spin toque transfer RAM (STT-RAM)  
PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 5, 页码: 1613-1625
作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Zhang, Lei;  Cheng, Yuanqing;  Li, Xiaowei
收藏  |  浏览/下载：53/0  |  提交时间：2019/12/13
3-D integration  IR-drop  phase-change memory (PCM)  through-silicon-via (TSV)  write throughput  
VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 3, 页码: 858-870
作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：35/0  |  提交时间：2019/12/13
Cache design  fault tolerant  multi-V-dd  near-threshold voltage (NTV)  nonuniform cache access (NUCA)  
Path Delay Test Generation Toward Activation of Worst Case Coupling Effects 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2011, 卷号: 19, 期号: 11, 页码: 1969-1982
作者:  Zhang, Minjin;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：73/0  |  提交时间：2019/12/16
Crosstalk-induced delay  delay testing  path delay fault  signal integrity  test generation  timing analysis  
Selected Transition Time Adjustment for Tolerating Crosstalk Effects on Network-on-Chip Interconnects 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2011, 卷号: 19, 期号: 10, 页码: 1787-1800
作者:  Zhang, Ying;  Li, Huawei;  Min, Yinghua;  Li, Xiaowei
收藏  |  浏览/下载：63/0  |  提交时间：2019/12/16
Crosstalk  crosstalk tolerance  interconnects  network-on-chip (NOC)  
Embedded test decompressor to reduce the required channels and vector memory of tester for complex processor circuit 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2007, 卷号: 15, 期号: 5, 页码: 531-540
作者:  Han, Yinhe;  Hu, Yu;  Li, Xiaowei;  Li, Huawei;  Chandra, Anshuman
收藏  |  浏览/下载：38/0  |  提交时间：2019/12/16
automatic test equipment (ATE)  Godson processor  MUX network  test stimulus decompression