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Asymptotically Optimal Circuit Depth for Quantum State Preparation and General Unitary Synthesis 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 10, 页码: 3301-3314
作者:  Sun, Xiaoming;  Tian, Guojing;  Yang, Shuai;  Yuan, Pei;  Zhang, Shengyu
收藏  |  浏览/下载：7/0  |  提交时间：2023/12/04
Circuit depth  depth-space tradeoff  quantum circuit  state preparation  unitary synthesis  
Variation Enhanced Attacks Against RRAM-Based Neuromorphic Computing System 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 5, 页码: 1588-1596
作者:  Lv, Hao;  Li, Bing;  Zhang, Lei;  Liu, Cheng;  Wang, Ying
收藏  |  浏览/下载：7/0  |  提交时间：2023/12/04
Security  Hardware  Neuromorphic engineering  Computational modeling  Circuit faults  Resistance  Immune system  Adversarial attack  fault injection attack  neuromorphic computing system (NCS)  processing in memory  reliability  resistive memory  
Re-FeMAT: A Reconfigurable Multifunctional FeFET-Based Memory Architecture 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 11, 页码: 5071-5084
作者:  Zhang, Xiaoyu;  Liu, Rui;  Song, Tao;  Yang, Yuxin;  Han, Yinhe;  Chen, Xiaoming
收藏  |  浏览/下载：13/0  |  提交时间：2023/07/12
Convolutional neural network (CNN)  ferroelectric field-effect transistor (FeFET)  few-shot learning  in-memory processing  ternary content-addressable memory (TCAM)  
Secured Data Transmission Over Insecure Networks-on-Chip by Modulating Inter-Packet Delays 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 11, 页码: 4313-4324
作者:  Xu, Jiaen;  Wang, Xiaohang;  Jiang, Yingtao;  Singh, Amit Kumar;  Gu, Chongyan;  Huang, Letian;  Yang, Mei;  Li, Shunbin
收藏  |  浏览/下载：13/0  |  提交时间：2023/07/12
Block coding  inter-packet delay  network-on-chip (NoC)  secure channel  
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 10, 页码: 3400-3413
作者:  Liu, Cheng;  Chu, Cheng;  Xu, Dawen;  Wang, Ying;  Wang, Qianlong;  Li, Huawei;  Li, Xiaowei;  Cheng, Kwang-Ting
收藏  |  浏览/下载：26/0  |  提交时间：2022/12/07
Circuit faults  Computational modeling  Deep learning  Hardware  Redundancy  Neural networks  Computer architecture  Deep learning accelerator (DLA)  fault detection  fault tolerance  hybrid computing architecture (HyCA)  
Practical Attacks on Deep Neural Networks by Memory Trojaning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 6, 页码: 1230-1243
作者:  Hu, Xing;  Zhao, Yang;  Deng, Lei;  Liang, Ling;  Zuo, Pengfei;  Ye, Jing;  Lin, Yingyan;  Xie, Yuan
收藏  |  浏览/下载：35/0  |  提交时间：2021/12/01
Trojan horses  Hardware  Integrated circuit modeling  Computational modeling  Security  Payloads  Convolutional neural networks (CNNs)  deep learning accelerator  deep learning attack  hardware Trojan  
A Guaranteed Secure Scan Design Based on Test Data Obfuscation by Cryptographic Hash 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4524-4536
作者:  Cui, Aijiao;  Li, Mengyang;  Qu, Gang;  Li, Huawei
收藏  |  浏览/下载：29/0  |  提交时间：2021/12/01
Ciphers  Encryption  Integrated circuits  Side-channel attacks  Testing  Cryptographic hash function  obfuscation logic  scan design  scan-based side-channel attack  
Software-Based Self-Testing Using Bounded Model Checking for Out-of-Order Superscalar Processors 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 3, 页码: 714-727
作者:  Zhang, Ying;  Chakrabarty, Krishnendu;  Peng, Zebo;  Rezine, Ahmed;  Li, Huawei;  Eles, Petru;  Jiang, Jianhui
收藏  |  浏览/下载：51/0  |  提交时间：2020/12/10
Circuit faults  Built-in self-test  Out of order  Model checking  Integrated circuit modeling  Bounded model checking (BMC)  online testing  out-of-order superscalar processors  software-based self-testing (SBST)  
Hardware Trojan Detection in Third-Party Digital Intellectual Property Cores by Multilevel Feature Analysis 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 7, 页码: 1370-1383
作者:  Chen, Xiaoming;  Liu, Qiaoyi;  Yao, Song;  Wang, Jia;  Xu, Qiang;  Wang, Yu;  Liu, Yongpan;  Yang, Huazhong
收藏  |  浏览/下载：60/0  |  提交时间：2019/12/10
Feature analysis  hardware Trojan (HT) detection  third-party intellectual property (IP) core