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HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 10, 页码: 3400-3413
作者:  Liu, Cheng;  Chu, Cheng;  Xu, Dawen;  Wang, Ying;  Wang, Qianlong;  Li, Huawei;  Li, Xiaowei;  Cheng, Kwang-Ting
收藏  |  浏览/下载：37/0  |  提交时间：2022/12/07
Circuit faults  Computational modeling  Deep learning  Hardware  Redundancy  Neural networks  Computer architecture  Deep learning accelerator (DLA)  fault detection  fault tolerance  hybrid computing architecture (HyCA)  
Cambricon-G: A Polyvalent Energy-Efficient Accelerator for Dynamic Graph Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 1, 页码: 116-128
作者:  Song, Xinkai;  Zhi, Tian;  Fan, Zhe;  Zhang, Zhenxing;  Zeng, Xi;  Li, Wei;  Hu, Xing;  Du, Zidong;  Guo, Qi;  Chen, Yunji
收藏  |  浏览/下载：37/0  |  提交时间：2022/06/21
Accelerator  architecture  graph neural networks (GNNs)  
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2021, 卷号: 70, 期号: 9, 页码: 1511-1525
作者:  Liang, Shengwen;  Wang, Ying;  Liu, Cheng;  He, Lei;  Li, Huawei;  Xu, Dawen;  Li, Xiaowei
收藏  |  浏览/下载：47/0  |  提交时间：2021/12/01
Neural networks  Hardware  System-on-chip  Task analysis  Feature extraction  Memory management  Graph neural network  accelerator architecture  hardware acceleration  
Hardware Acceleration for GCNs via Bidirectional Fusion 期刊论文
IEEE COMPUTER ARCHITECTURE LETTERS, 2021, 卷号: 20, 期号: 1, 页码: 4
作者:  Li, Han;  Yan, Mingyu;  Yang, Xiaocheng;  Deng, Lei;  Li, Wenming;  Ye, Xiaochun;  Fan, Dongrui;  Xie, Yuan
收藏  |  浏览/下载：44/0  |  提交时间：2021/12/01
Random access memory  Computational modeling  Analytical models  Hardware  Engines  Computer architecture  Transforms  Graph convolutional neural networks  hardware accelerator  bidirectional execution  inter-phase fusion  
ParaML: A Polyvalent Multicore Accelerator for Machine Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 9, 页码: 1764-1777
作者:  Zhou, Shengyuan;  Guo, Qi;  Du, Zidong;  Liu, Daofu;  Chen, Tianshi;  Li, Ling;  Liu, Shaoli;  Zhou, Jinhong;  Temam, Olivier;  Feng, Xiaobing;  Zhou, Xuehai;  Chen, Yunji
收藏  |  浏览/下载：60/0  |  提交时间：2020/12/10
Neural networks  Machine learning  Testing  Support vector machines  Linear regression  Computers  Computer architecture  Accelerator  machine learning (ML) techniques  multicore accelerator  
Addressing Irregularity in Sparse Neural Networks Through a Cooperative Software/Hardware Approach 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2020, 卷号: 69, 期号: 7, 页码: 968-985
作者:  Zeng, Xi;  Zhi, Tian;  Zhou, Xuda;  Du, Zidong;  Guo, Qi;  Liu, Shaoli;  Wang, Bingrui;  Wen, Yuanbo;  Wang, Chao;  Zhou, Xuehai;  Li, Ling;  Chen, Tianshi;  Sun, Ninghui;  Chen, Yunji
收藏  |  浏览/下载：60/0  |  提交时间：2020/12/10
Accelerator  architecture  deep neural networks  sparsity  
SqueezeFlow: A Sparse CNN Accelerator Exploiting Concise Convolution Rules 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2019, 卷号: 68, 期号: 11, 页码: 1663-1677
作者:  Li, Jiajun;  Jiang, Shuhao;  Gong, Shijun;  Wu, Jingya;  Yan, Junchao;  Yan, Guihai;  Li, Xiaowei
收藏  |  浏览/下载：48/0  |  提交时间：2020/12/10
Convolutional neural networks  accelerator architecture  hardware acceleration  
Addressing Sparsity in Deep Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2019, 卷号: 38, 期号: 10, 页码: 1858-1871
作者:  Zhou, Xuda;  Du, Zidong;  Zhang, Shijin;  Zhang, Lei;  Lan, Huiying;  Liu, Shaoli;  Li, Ling;  Guo, Qi;  Chen, Tianshi;  Chen, Yunji
收藏  |  浏览/下载：266/0  |  提交时间：2019/12/10
Accelerator  architecture  deep neural networks (DNNs)  sparsity  
Promoting the Harmony between Sparsity and Regularity: A Relaxed Synchronous Architecture for Convolutional Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2019, 卷号: 68, 期号: 6, 页码: 867-881
作者:  Lu, Wenyan;  Yan, Guihai;  Li, Jiajun;  Gong, Shijun;  Jiang, Shuhao;  Wu, Jingya;  Li, Xiaowei
收藏  |  浏览/下载：258/0  |  提交时间：2019/08/16
Convolutional neural networks  accelerator  architecture  parallelism  sparsity  
A Survey on Graph Processing Accelerators: Challenges and Opportunities 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2019, 卷号: 34, 期号: 2, 页码: 339-371
作者:  Gui, Chuang-Yi;  Zheng, Long;  He, Bingsheng;  Liu, Cheng;  Chen, Xin-Yu;  Liao, Xiao-Fei;  Jin, Hai
收藏  |  浏览/下载：97/0  |  提交时间：2019/08/16
graph processing accelerator  domain-specific architecture  performance  energy efficiency