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Trident: The Acceleration Architecture for High-Performance Private Set Intersection 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 4, 页码: 1152-1167
作者:  Zhang, Jinkai;  Yang, Yinghao;  Zhou, Zhe;  Hu, Zhicheng;  Zhao, Xin;  Chang, Liang;  Lu, Hang;  Li, Xiaowei
收藏  |  浏览/下载：5/0  |  提交时间：2025/06/25
Protocols  Receivers  Cryptography  Hardware  Central Processing Unit  Random access memory  Data privacy  Polynomials  Field programmable gate arrays  Computer architecture  Private set intersection (PSI)  fully homomorphic encryption (FHE)  FPGA accelerator  privacy computing  
A Data-Centric Software-Hardware Co-Designed Architecture for Large-Scale Graph Processing 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 4, 页码: 1109-1122
作者:  Li, Zerun;  Chen, Xiaoming;  Yang, Yuxin;  Min, Feng;  Zhang, Xiaoyu;  Han, Yinhe
收藏  |  浏览/下载：6/0  |  提交时间：2025/06/25
Bandwidth  Memory management  Computational modeling  System-on-chip  Software  Hardware  Computer architecture  Three-dimensional displays  Performance evaluation  Data communication  Large-scale graph processing  near memory computing  memory system  accelerator  
FuHsi: Shifting Base-Calling Closer to Sequencer via In-Cache Acceleration 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2025, 卷号: 40, 期号: 2, 页码: 482-499
作者:  Li, Ye-Wen;  Tan, Guang-Ming;  Li, Xue-Qi
收藏  |  浏览/下载：3/0  |  提交时间：2025/06/25
genome base-calling  in-cache accelerator  domain-specific architecture  genome analysis  Nanopore sequencing  
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 10, 页码: 3400-3413
作者:  Liu, Cheng;  Chu, Cheng;  Xu, Dawen;  Wang, Ying;  Wang, Qianlong;  Li, Huawei;  Li, Xiaowei;  Cheng, Kwang-Ting
收藏  |  浏览/下载：53/0  |  提交时间：2022/12/07
Circuit faults  Computational modeling  Deep learning  Hardware  Redundancy  Neural networks  Computer architecture  Deep learning accelerator (DLA)  fault detection  fault tolerance  hybrid computing architecture (HyCA)  
Cambricon-G: A Polyvalent Energy-Efficient Accelerator for Dynamic Graph Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 1, 页码: 116-128
作者:  Song, Xinkai;  Zhi, Tian;  Fan, Zhe;  Zhang, Zhenxing;  Zeng, Xi;  Li, Wei;  Hu, Xing;  Du, Zidong;  Guo, Qi;  Chen, Yunji
收藏  |  浏览/下载：63/0  |  提交时间：2022/06/21
Accelerator  architecture  graph neural networks (GNNs)  
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2021, 卷号: 70, 期号: 9, 页码: 1511-1525
作者:  Liang, Shengwen;  Wang, Ying;  Liu, Cheng;  He, Lei;  Li, Huawei;  Xu, Dawen;  Li, Xiaowei
收藏  |  浏览/下载：63/0  |  提交时间：2021/12/01
Neural networks  Hardware  System-on-chip  Task analysis  Feature extraction  Memory management  Graph neural network  accelerator architecture  hardware acceleration  
Hardware Acceleration for GCNs via Bidirectional Fusion 期刊论文
IEEE COMPUTER ARCHITECTURE LETTERS, 2021, 卷号: 20, 期号: 1, 页码: 4
作者:  Li, Han;  Yan, Mingyu;  Yang, Xiaocheng;  Deng, Lei;  Li, Wenming;  Ye, Xiaochun;  Fan, Dongrui;  Xie, Yuan
收藏  |  浏览/下载：60/0  |  提交时间：2021/12/01
Random access memory  Computational modeling  Analytical models  Hardware  Engines  Computer architecture  Transforms  Graph convolutional neural networks  hardware accelerator  bidirectional execution  inter-phase fusion  
ParaML: A Polyvalent Multicore Accelerator for Machine Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 9, 页码: 1764-1777
作者:  Zhou, Shengyuan;  Guo, Qi;  Du, Zidong;  Liu, Daofu;  Chen, Tianshi;  Li, Ling;  Liu, Shaoli;  Zhou, Jinhong;  Temam, Olivier;  Feng, Xiaobing;  Zhou, Xuehai;  Chen, Yunji
收藏  |  浏览/下载：87/0  |  提交时间：2020/12/10
Neural networks  Machine learning  Testing  Support vector machines  Linear regression  Computers  Computer architecture  Accelerator  machine learning (ML) techniques  multicore accelerator  
Addressing Irregularity in Sparse Neural Networks Through a Cooperative Software/Hardware Approach 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2020, 卷号: 69, 期号: 7, 页码: 968-985
作者:  Zeng, Xi;  Zhi, Tian;  Zhou, Xuda;  Du, Zidong;  Guo, Qi;  Liu, Shaoli;  Wang, Bingrui;  Wen, Yuanbo;  Wang, Chao;  Zhou, Xuehai;  Li, Ling;  Chen, Tianshi;  Sun, Ninghui;  Chen, Yunji
收藏  |  浏览/下载：81/0  |  提交时间：2020/12/10
Accelerator  architecture  deep neural networks  sparsity  
SqueezeFlow: A Sparse CNN Accelerator Exploiting Concise Convolution Rules 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2019, 卷号: 68, 期号: 11, 页码: 1663-1677
作者:  Li, Jiajun;  Jiang, Shuhao;  Gong, Shijun;  Wu, Jingya;  Yan, Junchao;  Yan, Guihai;  Li, Xiaowei
收藏  |  浏览/下载：64/0  |  提交时间：2020/12/10
Convolutional neural networks  accelerator architecture  hardware acceleration