Trident: The Acceleration Architecture for High-Performance Private Set Intersection

doi:10.1109/TC.2024.3517738

	Trident: The Acceleration Architecture for High-Performance Private Set Intersection
	Zhang, Jinkai 1; Yang, Yinghao 1; Zhou, Zhe 1; Hu, Zhicheng 2; Zhao, Xin 2; Chang, Liang 2; Lu, Hang 1; Li, Xiaowei 1
	2025-04-01
发表期刊	IEEE TRANSACTIONS ON COMPUTERS
ISSN	0018-9340
卷号	74 期号:4 页码:1152-1167
摘要	Private Set Intersection (PSI) is imperative in discovering the properties of the same data owned by two competitive parties, without revealing anything else of their respective data asset. Existing PSI solutions such as APSI and ORI-PSI suffer from severe communication and computation overhead due to inefficient communication and FHE polynomial evaluation, which hinders their deployment in practice. This issue is evident in both the upper-level protocol and the lower-level hardware platform. In this paper, we propose a novel software/hardware co-design acceleration architecture for PSI, termed as "Trident", which includes two tightly coupled segments: from the protocol perspective, we investigate existing bottlenecks and propose a new PSI protocol with significantly less communication and computation under the security guarantee; besides, we re-architect the hardware platform by designing a PSI-specific accelerator, implemented with both FPGA and ASIC, targeting the key operations in the proposed protocol. We build a real-world experimental environment with two instantiated parties to verify the acceleration architecture, and highlight the following results: (1) up to 130x/145x speedup for the computation of receiver and sender parties; (2) up to 37x reduction of communication overhead. (3) up to 93,651x and 74,326x higher energy efficiency over the CPU-based ORI-PSI and APSI, respectively.
关键词	Protocols Receivers Cryptography Hardware Central Processing Unit Random access memory Data privacy Polynomials Field programmable gate arrays Computer architecture Private set intersection (PSI) fully homomorphic encryption (FHE) FPGA accelerator privacy computing
DOI	10.1109/TC.2024.3517738
收录类别	SCI
语种	英语
资助项目	National Natural Science Foundation of China[62172387] ; Youth Innovation Promotion Association of Chinese Academy of Sciences (CAS)[2021098] ; Open Research Fund of the State Key Laboratory of Blockchain and Data Security, Zhejiang University
WOS研究方向	Computer Science ; Engineering
WOS类目	Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS记录号	WOS:001442951900014
出版者	IEEE COMPUTER SOC
引用统计
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/40695
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Zhang, Jinkai; Lu, Hang
作者单位	1.Chinese Acad Sci, Inst Comp Technol, Beijing 100190, Peoples R China 2.Univ Elect Sci & Technol China, Chengdu 610054, Peoples R China
推荐引用方式 GB/T 7714	Zhang, Jinkai,Yang, Yinghao,Zhou, Zhe,et al. Trident: The Acceleration Architecture for High-Performance Private Set Intersection[J]. IEEE TRANSACTIONS ON COMPUTERS,2025,74(4):1152-1167.
APA	Zhang, Jinkai.,Yang, Yinghao.,Zhou, Zhe.,Hu, Zhicheng.,Zhao, Xin.,...&Li, Xiaowei.(2025).Trident: The Acceleration Architecture for High-Performance Private Set Intersection.IEEE TRANSACTIONS ON COMPUTERS,74(4),1152-1167.
MLA	Zhang, Jinkai,et al."Trident: The Acceleration Architecture for High-Performance Private Set Intersection".IEEE TRANSACTIONS ON COMPUTERS 74.4(2025):1152-1167.