中国科学院计算技术研究所机构知识库

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	Taming Process Variations in CNFET for Efficient Last-Level Cache Design 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2022, 卷号: 30, 期号: 4, 页码: 418-431 作者:  Xu, Dawen;  Feng, Zhuangyu;  Liu, Cheng;  Li, Li;  Wang, Ying;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：32/0  |  提交时间：2022/12/07 CNTFETs  Delays  Transistors  Layout  Very large scale integration  Radio frequency  Energy consumption  nanotube field-effect transistor (CNFET)  last-level cache (LLC)  process variation (PV)  variation-aware cache
	Machine-learning-based cache partition method in cloud environment 期刊论文 PEER-TO-PEER NETWORKING AND APPLICATIONS, 2021, 页码: 14 作者:  Qiu, Jiefan;  Hua, Zonghan;  Liu, Lei;  Cao, Mingsheng;  Chen, Dajiang 收藏  |  浏览/下载：49/0  |  提交时间：2021/12/01 Cloud  Cache Partition  Last Level Cache  Machine Learning
	Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy 期刊论文 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 卷号: 67, 期号: 1, 页码: 108-120 作者:  Wu, Bi;  Dai, Pengcheng;  Wang, Zhaohao;  Wang, Chao;  Wang, Ying;  Yang, Jianlei;  Cheng, Yuanqing;  Liu, Dijun;  Zhang, Youguang;  Zhao, Weisheng;  Hu, Xiaobo Sharon 收藏  |  浏览/下载：55/0  |  提交时间：2020/12/10 NAND-SPIN  spin orbit torque (SOT) MRAM  last level cache  write throughput  high performance
	An Adaptive Thermal-Aware ECC Scheme for Reliable STT-MRAM LLC Design 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2019, 卷号: 27, 期号: 8, 页码: 1851-1860 作者:  Wu, Bi;  Zhang, Beibei;  Cheng, Yuanqing;  Wang, Ying;  Liu, Dijun;  Zhao, Weisheng 收藏  |  浏览/下载：84/0  |  提交时间：2019/12/10 Error correction code (ECC)  last level cache (LLC)  reliability  spin-transfer-torque magnetoresistive random-access memory (STT-MRAM)  temperature