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中国科学院计算技术研究所机构知识库
Institute of Computing Technology, Chinese Academy IR
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浏览/检索结果:
共231条,第1-10条
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GRACE: An End-to-End Graph Processing Accelerator on FPGA With Graph Reordering Engine
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 10, 页码: 3816-3829
作者:
Fan, Haishuang
;
Meng, Rui
;
Sun, Qichu
;
Wu, Jingya
;
Lu, Wenyan
;
Li, Xiaowei
;
Yan, Guihai
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Field programmable gate arrays
Redundancy
Indexes
Graphics processing units
Central Processing Unit
Integrated circuit modeling
Computational modeling
Engines
Design automation
Data models
Accelerator
FPGA
Graph processing
Co-ViSu: Accelerating Video Super-Resolution With Codec Information Reuse
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3451-3464
作者:
Fan, Haishuang
;
Sun, Qichu
;
Wu, Jingya
;
Lu, Wenyan
;
Li, Xiaowei
;
Yan, Guihai
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Binary sequences
Streaming media
Decoding
Artificial neural networks
Superresolution
Kernel
Engines
Design automation
Video codecs
Throughput
Accelerator
codec
FPGA
super-resolution (SR)
DNA: A General
D
ynamic Neural
N
etwork
A
ccelerator
期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 9, 页码: 3210-3222
作者:
Liu, Lian
;
Yu, Jinxin
;
Wang, Mengdi
;
Li, Xiaowei
;
Han, Yinhe
;
Wang, Ying
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Dynamic scheduling
Artificial neural networks
DNA
Processor scheduling
Loading
Prefetching
Runtime
Costs
Switches
Optimization
Dynamic NN
NPU design
accelerator
Memory-Efficient and Adaptive Heterogeneous Framework for Gate-Level Fault Simulation
期刊论文
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2025, 卷号: 30, 期号: 5, 页码: 27
作者:
Chao, Zhiteng
;
Gu, Feng
;
Huang, Junying
;
Li, Wenjie
;
Ye, Jing
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Heterogeneous
memory-efficient
adaptive
KPU: Kernel Processing Unit for in-Memory Analytical Query Processing
期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 8, 页码: 2702-2716
作者:
Wu, Jingya
;
Lu, Wenyan
;
Fan, Haishuang
;
Kong, Hao
;
Li, Xiaowei
;
Yan, Guihai
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Kernel
Bandwidth
Hardware
Central Processing Unit
Query processing
Programming
Parallel processing
Computers
Satellites
Database
domain-specific computer architecture
programmability
SQL
SQL
Functional Testing and Repair for ReRAM-Based Deep-Learning Accelerators
期刊论文
IEEE DESIGN & TEST, 2025, 卷号: 42, 期号: 3, 页码: 66-73
作者:
Li, Wen
;
Wang, Ying
;
Li, Huawei
;
Li, Xiaowei
;
Zou, Kaiwei
收藏
  |  
浏览/下载:37/0
  |  
提交时间:2025/06/25
Accuracy
Fault tolerant systems
Fault tolerance
Deep learning
Image edge detection
Fault detection
Computational modeling
Training
Reliability
Hafnium
Deep Neural Network
ReRAM
Functional Test
Computing-in-Memory
Trident: The Acceleration Architecture for High-Performance Private Set Intersection
期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 4, 页码: 1152-1167
作者:
Zhang, Jinkai
;
Yang, Yinghao
;
Zhou, Zhe
;
Hu, Zhicheng
;
Zhao, Xin
;
Chang, Liang
;
Lu, Hang
;
Li, Xiaowei
收藏
  |  
浏览/下载:38/0
  |  
提交时间:2025/06/25
Protocols
Receivers
Cryptography
Hardware
Central Processing Unit
Random access memory
Data privacy
Polynomials
Field programmable gate arrays
Computer architecture
Private set intersection (PSI)
fully homomorphic encryption (FHE)
FPGA accelerator
privacy computing
APoX-M: Accelerate deep point cloud analysis via adaptive graph construction
期刊论文
INTEGRATION-THE VLSI JOURNAL, 2025, 卷号: 101, 页码: 10
作者:
Dai, Lei
;
Liang, Shengwen
;
Wang, Ying
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:13/0
  |  
提交时间:2025/06/25
K nearest neighbor
Approximate nearest neighbor
Point cloud
Graph construction
A fast test compaction method using dedicated Pure MaxSAT solver embedded in DFT flow
期刊论文
INTEGRATION-THE VLSI JOURNAL, 2025, 卷号: 100, 页码: 11
作者:
Chao, Zhiteng
;
Zhang, Xindi
;
Huang, Junying
;
Liu, Zizhen
;
Zhao, Yixuan
;
Ye, Jing
;
Cai, Shaowei
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:48/0
  |  
提交时间:2024/12/06
Static test compaction
Pure MaxSAT
DFT
ATPG
A Task-Adaptive In-Situ ReRAM Computing for Graph Convolutional Networks
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 9, 页码: 2635-2646
作者:
He, Yintao
;
Li, Bing
;
Wang, Ying
;
Liu, Cheng
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:67/0
  |  
提交时间:2024/12/06
Task analysis
Sparse matrices
Convolution
Convolutional neural networks
Design automation
Neural networks
Integrated circuits
Graph convolutional network
hardware acceleration
processing-in-memory