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A fast test compaction method using dedicated Pure MaxSAT solver embedded in DFT flow 期刊论文
INTEGRATION-THE VLSI JOURNAL, 2025, 卷号: 100, 页码: 11
作者:  Chao, Zhiteng;  Zhang, Xindi;  Huang, Junying;  Liu, Zizhen;  Zhao, Yixuan;  Ye, Jing;  Cai, Shaowei;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：3/0  |  提交时间：2024/12/06
Static test compaction  Pure MaxSAT  DFT  ATPG  
A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition 期刊论文
INTEGRATION-THE VLSI JOURNAL, 2019, 卷号: 66, 页码: 164-172
作者:  Wei, Xing;  Yang, Haigang;  Li, Wei;  Huang, Zhihong;  Yin, Tao;  Yu, Le
收藏  |  浏览/下载：94/0  |  提交时间：2019/08/16
Floating-point  Fast fourier transform (FFT)  Mixed-radix  Multi-path delay feedback (MDF)  Binary-tree decomposition  Twiddle factor  Fused FP arithmetic unit  
PUFPass: A password management mechanism based on software/hardware codesign 期刊论文
INTEGRATION-THE VLSI JOURNAL, 2019, 卷号: 64, 页码: 173-183
作者:  Guo, Qingli;  Ye, Jing;  Li, Bing;  Hu, Yu;  Li, Xiaowei;  Lan, Yazhu;  Zhang, Guohe
收藏  |  浏览/下载：77/0  |  提交时间：2019/04/03
Password  Password management mechanism  PUF  Security  Usability  
LOFT: A low-overhead fault-tolerant routing scheme for 3D NoCs 期刊论文
INTEGRATION-THE VLSI JOURNAL, 2016, 卷号: 52, 页码: 41-50
作者:  Zhou, Jun;  Li, Huawei;  Wang, Tiancheng;  Li, Xiaowei
收藏  |  浏览/下载：52/0  |  提交时间：2019/12/13
Networks-on-chip  3D Mesh  Permanent fault  Fault-tolerance  Routing scheme  
Capture-power-aware test data compression using selective encoding 期刊论文
INTEGRATION-THE VLSI JOURNAL, 2011, 卷号: 44, 期号: 3, 页码: 205-216
作者:  Li, Jia;  Liu, Xiao;  Zhang, Yubin;  Hu, Yu;  Li, Xiaowei;  Xu, Qiang
收藏  |  浏览/下载：74/0  |  提交时间：2019/12/16
Test compression  Low-power testing  Scan-based testing  
Statistical lifetime reliability optimization considering joint effect of process variation and aging 期刊论文
INTEGRATION-THE VLSI JOURNAL, 2011, 卷号: 44, 期号: 3, 页码: 185-191
作者:  Jin, Song;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：72/0  |  提交时间：2019/12/16
Lifetime reliability  Process variation  NBTI  Duty cycle  Gate sizing