A fast test compaction method using dedicated Pure MaxSAT solver embedded in DFT flow

doi:10.1016/j.vlsi.2024.102265

	A fast test compaction method using dedicated Pure MaxSAT solver embedded in DFT flow
	Chao, Zhiteng 1,3; Zhang, Xindi 2,3; Huang, Junying 1,3; Liu, Zizhen 1; Zhao, Yixuan 1; Ye, Jing 1,3,4; Cai, Shaowei 2,3; Li, Huawei 1,3,4; Li, Xiaowei 1,3,4
	2025
发表期刊	INTEGRATION-THE VLSI JOURNAL
ISSN	0167-9260
卷号	100 页码:11
摘要	Minimizing the testing cost is crucial in the context of the design for test (DFT) flow. In our observation, the test patterns generated by ATPG tools in test compression mode still contain redundancy. To tackle this obstacle, we propose a post-flow static test compaction method that utilizes a partial fault dictionary instead of a full fault dictionary to sharply reduce time and memory overhead, and leverages a dedicated Pure MaxSAT solver to re-compact the test patterns generated by ATPG tools. We also observe that ATPG tools offer a more comprehensive selection of candidate patterns for compaction in the "n-detect'' mode, leading to superior compaction efficiency. In our experiments conducted on benchmark circuits ISCAS89, ITC99, and an open-source RISC-V CPU, we employed two methodologies. For commercial tool, we utilized a non-intrusive approach, while we adopted an intrusive method for open-source ATPG. Under the non-intrusive approach, our method achieved a maximum reduction of 34.69% in pattern count and a maximum 29.80% decrease in test cycles as evaluated by a leading commercial tool. Meanwhile, under the intrusive approach, our method attained a maximum 71.90% reduction in pattern count as evaluated by an open-source ATPG tool. Notably, fault coverage remained unchanged throughout the experiments. Furthermore, our approach demonstrates improved performance compared with existing methods.
关键词	Static test compaction Pure MaxSAT DFT ATPG
DOI	10.1016/j.vlsi.2024.102265
收录类别	SCI
语种	英语
资助项目	National Natural Science Foundation of China (NSFC)[92373206] ; National Natural Science Foundation of China (NSFC)[U20A20202] ; National Natural Science Foundation of China (NSFC)[62090024] ; Strategic Priority Research Program of the Chinese Academy of Sciences[XDA0320000] ; Strategic Priority Research Program of the Chinese Academy of Sciences[XDA0320300] ; Youth Innovation Promotion Association CAS
WOS研究方向	Computer Science ; Engineering
WOS类目	Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS记录号	WOS:001311541200001
出版者	ELSEVIER
引用统计
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/39596
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Liu, Zizhen
作者单位	1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Processors, Beijing, Peoples R China 2.Chinese Acad Sci, Inst Software, State Key Lab Comp Sci, Beijing, Peoples R China 3.Univ Chinese Acad Sci, Sch Comp Sci & Technol, Beijing, Peoples R China 4.CASTEST Co Ltd, Beijing, Peoples R China
推荐引用方式 GB/T 7714	Chao, Zhiteng,Zhang, Xindi,Huang, Junying,et al. A fast test compaction method using dedicated Pure MaxSAT solver embedded in DFT flow[J]. INTEGRATION-THE VLSI JOURNAL,2025,100:11.
APA	Chao, Zhiteng.,Zhang, Xindi.,Huang, Junying.,Liu, Zizhen.,Zhao, Yixuan.,...&Li, Xiaowei.(2025).A fast test compaction method using dedicated Pure MaxSAT solver embedded in DFT flow.INTEGRATION-THE VLSI JOURNAL,100,11.
MLA	Chao, Zhiteng,et al."A fast test compaction method using dedicated Pure MaxSAT solver embedded in DFT flow".INTEGRATION-THE VLSI JOURNAL 100(2025):11.