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Dadu-SV: Accelerate Stereo Vision Processing on NPU 期刊论文
IEEE EMBEDDED SYSTEMS LETTERS, 2022, 卷号: 14, 期号: 4, 页码: 191-194
作者:  Min, Feng;  Wang, Ying;  Xu, Haobo;  Huang, Junpei;  Wang, Yujie;  Zou, Xingqi;  Lu, Meixuan;  Han, Yinhe
收藏  |  浏览/下载：14/0  |  提交时间：2023/07/12
Hardware acceleration  neural computing  neural processing unit (NPU)  semiglobal matching (SGM)  stereo vision  
Amphis: Managing Reconfigurable Processor Architectures With Generative Adversarial Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 11, 页码: 3993-4003
作者:  Chen, Weiwei;  Wang, Ying;  Xu, Ying;  Gao, Chengsi;  Han, Yinhe;  Zhang, Lei
收藏  |  浏览/下载：14/0  |  提交时间：2023/07/12
Resource management  Predictive models  Runtime  Generators  Generative adversarial networks  Computational modeling  Training  Design space exploration  generative adversarial network (GAN)  reconfigurable processor  
A Low Overhead In-Network Data Compressor for the Memory Hierarchy of Chip Multiprocessors 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 6, 页码: 1265-1277
作者:  Wang, Ying;  Li, Huawei;  Han, Yinhe;  Li, Xiaowei
收藏  |  浏览/下载：67/0  |  提交时间：2019/12/10
Cache  chip multiprocessor (CMP)  compression  memory hierarchy  network-on-chip (NoC)  
STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 4, 页码: 1285-1296
作者:  Song, Lili;  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Cheng, Yuanqing;  Li, Xiaowei
收藏  |  浏览/下载：70/0  |  提交时间：2019/12/12
Approximate computing  machine learning  neural network  spin toque transfer RAM (STT-RAM)  
PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 5, 页码: 1613-1625
作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Zhang, Lei;  Cheng, Yuanqing;  Li, Xiaowei
收藏  |  浏览/下载：53/0  |  提交时间：2019/12/13
3-D integration  IR-drop  phase-change memory (PCM)  through-silicon-via (TSV)  write throughput  
VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 3, 页码: 858-870
作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：35/0  |  提交时间：2019/12/13
Cache design  fault tolerant  multi-V-dd  near-threshold voltage (NTV)  nonuniform cache access (NUCA)  
Enhanced Wear-Rate Leveling for PRAM Lifetime Improvement Considering Process Variation 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 1, 页码: 92-102
作者:  Han, Yinhe;  Dong, Jianbo;  Weng, Kaiheng;  Wang, Ying;  Li, Xiaowei
收藏  |  浏览/下载：42/0  |  提交时间：2019/12/13
Endurance  phase-change random access memory (PRAM)  wear leveling (WL)  
RISO: Enforce Noninterfered Performance With Relaxed Network-on-Chip Isolation in Many-Core Cloud Processors 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2015, 卷号: 23, 期号: 12, 页码: 3053-3064
作者:  Lu, Hang;  Fu, Binzhang;  Wang, Ying;  Han, Yinhe;  Yan, Guihai;  Li, Xiaowei
收藏  |  浏览/下载：39/0  |  提交时间：2019/12/13
Cloud processor  networks-on-chip (NoCs)  performance isolation  relaxed isolation (RISO)  workload consolidation