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Accelerating Data Transfer in Dataflow Architectures Through a Look-Ahead Acknowledgment Mechanism 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2022, 卷号: 37, 期号: 4, 页码: 942-959
作者:  Feng, Yu-Jing;  Li, De-Jian;  Tan, Xu;  Ye, Xiao-Chun;  Fan, Dong-Rui;  Li, Wen-Ming;  Wang, Da;  Zhang, Hao;  Tang, Zhi-Min
收藏  |  浏览/下载：25/0  |  提交时间：2022/12/07
dataflow model  control-ow model  high-performance computing application  data transfer  power efficiency  
NfvInsight: A Framework for Automatically Deploying and Benchmarking VNF Chains 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2022, 卷号: 37, 期号: 3, 页码: 680-698
作者:  Xu, Tian-Ni;  Sun, Hai-Feng;  Zhang, Di;  Zhou, Xiao-Ming;  Sui, Xiu-Feng;  Wang, Sa;  Huang, Qun;  Bao, Yun-Gang
收藏  |  浏览/下载：23/0  |  提交时间：2022/12/07
network function virtualization (NFV)  service chain  performance bottleneck  network stack latency  
Exploiting the Community Structure of Fraudulent Keywords for Fraud Detection in Web Search 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2021, 卷号: 36, 期号: 5, 页码: 1167-1183
作者:  Yang, Dong-Hui;  Li, Zhen-Yu;  Wang, Xiao-Hui;  Salamatian, Kave;  Xie, Gao-Gang
收藏  |  浏览/下载：38/0  |  提交时间：2021/12/01
community structure  fraud analysis  fraudulent keyword detection  web search  
Evaluating and Constraining Hardware Assertions with Absent Scenarios 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2020, 卷号: 35, 期号: 5, 页码: 1198-1216
作者:  Chao, Hui-Na;  Li, Hua-Wei;  Song, Xiaoyu;  Wang, Tian-Cheng;  Li, Xiao-Wei
收藏  |  浏览/下载：30/0  |  提交时间：2021/12/01
hardware formal verification  assertion generation  data mining  assertion evaluation  assertion coverage  
A Non-Stop Double Buffering Mechanism for Dataflow Architecture 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2018, 卷号: 33, 期号: 1, 页码: 145-157
作者:  Tan, Xu;  Shen, Xiao-Wei;  Ye, Xiao-Chun;  Wang, Da;  Fan, Dong-Rui;  Zhang, Lunkai;  Li, Wen-Ming;  Zhang, Zhi-Min;  Tang, Zhi-Min
收藏  |  浏览/下载：67/0  |  提交时间：2019/12/10
non-stop  double buffering  dataflow architecture  high-performance computing  
A Pipelining Loop Optimization Method for Dataflow Architecture 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2018, 卷号: 33, 期号: 1, 页码: 116-130
作者:  Tan, Xu;  Ye, Xiao-Chun;  Shen, Xiao-Wei;  Xu, Yuan-Chao;  Wang, Da;  Zhang, Lunkai;  Li, Wen-Ming;  Fan, Dong-Rui;  Tang, Zhi-Min
收藏  |  浏览/下载：74/0  |  提交时间：2019/12/10
dataflow model  control-flow model  loop optimization  exascale computing  scientific application  
A Power and Area Optimization Approach of Mixed Polarity Reed-Muller Expression for Incompletely Specified Boolean Functions 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2017, 卷号: 32, 期号: 2, 页码: 297-311
作者:  He, Zhen-Xue;  Xiao, Li -Min;  Ruan, Li;  Gu, Fei;  Huo, Zhi-Sheng;  Qin, Guang-Jun;  Zhu, Ming-Fa;  Zhang, Long-Bing;  Liu, Rui;  Wang, Xiang
收藏  |  浏览/下载：55/0  |  提交时间：2019/12/12
power and area optimization  Reed-Muller (RM) circuit  Pareto optimal solution  don't care term  chromosome conversion  
DLPlib: A Library for Deep Learning Processor 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2017, 卷号: 32, 期号: 2, 页码: 286-296
作者:  Lan, Hui-Ying;  Wu, Lin-Yang;  Zhang, Xiao;  Tao, Jin-Hua;  Chen, Xun-Yu;  Wang, Bing-Rui;  Wang, Yu-Qing;  Guo, Qi;  Chen, Yun-Ji
收藏  |  浏览/下载：69/0  |  提交时间：2019/12/12
deep learning processor  API  library  DLPlib  
An Efficient Network-on-Chip Router for Dataflow Architecture 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2017, 卷号: 32, 期号: 1, 页码: 11-25
作者:  Shen, Xiao-Wei;  Ye, Xiao-Chun;  Tan, Xu;  Wang, Da;  Zhang, Lunkai;  Li, Wen-Ming;  Zhang, Zhi-Min;  Fan, Dong-Rui;  Sun, Ning-Hui
收藏  |  浏览/下载：56/0  |  提交时间：2019/12/12
multi-destination  router  network-on-chip  dataflow architecture  high-performance computing  
Physical Implementation of the Eight-Core Godson-3B Microprocessor 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2011, 卷号: 26, 期号: 3, 页码: 520-527
作者:  Wang, Ru;  Fan, Bao-Xia;  Yang, Liang;  Gao, Yan-Ping;  Liu, Dong;  Xiao, Bin;  Wang, Jiang-Mei;  Zhang, Yi-Fu;  Wang, Hong;  Hu, Wei-Wu
收藏  |  浏览/下载：81/0  |  提交时间：2019/12/16
physical implementation  hierarchical design flow  GALS  clock mesh  low power