An Efficient Network-on-Chip Router for Dataflow Architecture

doi:10.1007/s11390-017-1703-5

	An Efficient Network-on-Chip Router for Dataflow Architecture
	Shen, Xiao-Wei 1,2; Ye, Xiao-Chun 1; Tan, Xu 1,2; Wang, Da 1; Zhang, Lunkai 3; Li, Wen-Ming 1; Zhang, Zhi-Min 1; Fan, Dong-Rui 1; Sun, Ning-Hui 1
	2017
发表期刊	JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
ISSN	1000-9000
卷号	32 期号:1 页码:11-25
摘要	Dataflow architecture has shown its advantages in many high-performance computing cases. In dataflow computing, a large amount of data are frequently transferred among processing elements through the network-on-chip (NoC). Thus the router design has a significant impact on the performance of dataflow architecture. Common routers are designed for control-flow multi-core architecture and we find they are not suitable for dataflow architecture. In this work, we analyze and extract the features of data transfers in NoCs of dataflow architecture: multiple destinations, high injection rate, and performance sensitive to delay. Based on the three features, we propose a novel and efficient NoC router for dataflow architecture. The proposed router supports multi-destination; thus it can transfer data with multiple destinations in a single transfer. Moreover, the router adopts output buffer to maximize throughput and adopts non-flit packets to minimize transfer delay. Experimental results show that the proposed router can improve the performance of dataflow architecture by 3.6x over a state-of-the-art router.
关键词	multi-destination router network-on-chip dataflow architecture high-performance computing
DOI	10.1007/s11390-017-1703-5
收录类别	SCI
语种	英语
资助项目	National High Technology Research and Development 863 Program of China[2015AA01A301] ; National Natural Science Foundation of China[61332009] ; National HeGaoJi Project of China[2013ZX0102-8001-001-001] ; Beijing Municipal Science and Technology Commission[Z15010101009] ; Beijing Municipal Science and Technology Commission[Z151100003615006]
WOS研究方向	Computer Science
WOS类目	Computer Science, Hardware & Architecture ; Computer Science, Software Engineering
WOS记录号	WOS:000392106200003
出版者	SCIENCE PRESS
引用统计	被引频次：12[WOS] [WOS记录] [WOS相关记录]
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/7655
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Ye, Xiao-Chun
作者单位	1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, Beijing 100190, Peoples R China 2.Univ Chinese Acad Sci, Sch Comp & Control Engn, Beijing 100049, Peoples R China 3.Univ Chicago, Dept Comp Sci, Chicago, IL 60637 USA
推荐引用方式 GB/T 7714	Shen, Xiao-Wei,Ye, Xiao-Chun,Tan, Xu,et al. An Efficient Network-on-Chip Router for Dataflow Architecture[J]. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,2017,32(1):11-25.
APA	Shen, Xiao-Wei.,Ye, Xiao-Chun.,Tan, Xu.,Wang, Da.,Zhang, Lunkai.,...&Sun, Ning-Hui.(2017).An Efficient Network-on-Chip Router for Dataflow Architecture.JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,32(1),11-25.
MLA	Shen, Xiao-Wei,et al."An Efficient Network-on-Chip Router for Dataflow Architecture".JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 32.1(2017):11-25.