中国科学院计算技术研究所机构知识库

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限定条件	作者：Wang, Ying    第一作者

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择期刊影响因子升序期刊影响因子降序发表日期升序发表日期降序提交时间升序提交时间降序作者升序作者降序WOS被引频次升序WOS被引频次降序题名升序题名降序
	Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses 期刊论文 ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2023, 卷号: 28, 期号: 4, 页码: 23 作者:  Chu, Cheng;  Liu, Cheng;  Xu, Dawen;  Wang, Ying;  Luo, Tao;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：7/0  |  提交时间：2023/12/04 Deformable convolution network  neural network accelerator  irregular memory access  runtime tile scheduling
	Optimus: An Operator Fusion Framework for Deep Neural Networks 期刊论文 ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2023, 卷号: 22, 期号: 1, 页码: 26 作者:  Cai, Xuyi;  Wang, Ying;  Zhang, Lei 收藏  |  浏览/下载：15/0  |  提交时间：2023/07/12 Neural network  embedded processor  memory  layer fusion
	TripleBrain: A Compact Neuromorphic Hardware Core With Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity 期刊论文 IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, 2022, 卷号: 16, 期号: 4, 页码: 636-650 作者:  Wang, Haibing;  He, Zhen;  Wang, Tengxiao;  He, Junxian;  Zhou, Xichuan;  Wang, Ying;  Liu, Liyuan;  Wu, Nanjian;  Tian, Min;  Shi, Cong 收藏  |  浏览/下载：13/0  |  提交时间：2023/07/12 Neurons  Neuromorphics  Hardware  System-on-chip  Field programmable gate arrays  Synapses  Self-organizing feature maps  Neuromorphic system  spiking neural network  spike-timing dependent plasticity  self-organizing map  reinforce- ment learning  on-chip learning
	Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 7, 页码: 2115-2127 作者:  He, Yintao;  Wang, Ying;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：27/0  |  提交时间：2022/12/07 Computer architecture  Microprocessors  Resistance  Power demand  Training  Biological neural networks  Optimization  Low power (LP)  neural networks  processing-in-memory  resistive random-access memory (RRAM)
	CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2022, 卷号: 71, 期号: 7, 页码: 1626-1639 作者:  Zou, Kaiwei;  Wang, Ying;  Cheng, Long;  Qu, Songyun;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：29/0  |  提交时间：2022/12/07 Kernel  Computer architecture  Multicore processing  Deep learning  System-on-chip  Parallel processing  Real-time systems  Neural networks  parallel processing  real-time and embedded systems  single-chip multiprocessors  reinforcement learning  structured sparsity
	A Low-Cost FPGA Implementation of Spiking Extreme Learning Machine With On-Chip Reward-Modulated STDP Learning 期刊论文 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 卷号: 69, 期号: 3, 页码: 1657-1661 作者:  He, Zhen;  Shi, Cong;  Wang, Tengxiao;  Wang, Ying;  Tian, Min;  Zhou, Xichuan;  Li, Ping;  Liu, Liyuan;  Wu, Nanjian;  Luo, Gang 收藏  |  浏览/下载：24/0  |  提交时间：2022/12/07 Neurons  Hardware  System-on-chip  Costs  Training  Field programmable gate arrays  Computational modeling  Neuromorphic computing  spiking neural network  extreme learning machine  spike-timing-dependent plasticity  reward-modulated  on-chip learning
	LINAC: A Spatially Linear Accelerator for Convolutional Neural Networks 期刊论文 IEEE COMPUTER ARCHITECTURE LETTERS, 2022, 卷号: 21, 期号: 1, 页码: 29-32 作者:  Xiao, Hang;  Xu, Haobo;  Wang, Ying;  Wang, Yujie;  Han, Yinhe 收藏  |  浏览/下载：21/0  |  提交时间：2022/12/07 Linear particle accelerator  Correlation  Kernel  Convolution  Linear regression  System-on-chip  Quantization (signal)  Neural network  acceleration  convolution  linear regression  bit-sparsity
	EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2021, 卷号: 70, 期号: 9, 页码: 1511-1525 作者:  Liang, Shengwen;  Wang, Ying;  Liu, Cheng;  He, Lei;  Li, Huawei;  Xu, Dawen;  Li, Xiaowei 收藏  |  浏览/下载：38/0  |  提交时间：2021/12/01 Neural networks  Hardware  System-on-chip  Task analysis  Feature extraction  Memory management  Graph neural network  accelerator architecture  hardware acceleration
	An Edge 3D CNN Accelerator for Low-Power Activity Recognition 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 5, 页码: 918-930 作者:  Wang, Ying;  Wang, Yongchen;  Shi, Cong;  Cheng, Long;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：37/0  |  提交时间：2021/12/01 Three-dimensional displays  Two dimensional displays  Arrays  Feature extraction  System-on-chip  Redundancy  3D CNN  activity analysis  CNN accelerator  network-on-chip  video
	A Case of On-Chip Memory Subsystem Design for Low-Power CNN Accelerators 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 10, 页码: 1971-1984 作者:  Wang, Ying;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：68/0  |  提交时间：2019/12/10 Convolutional neural network (CNN)  deep learning  low power  memory subsystem