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Reconfiguration algorithms for synchronous communication on switch based degradable arrays 期刊论文
PARALLEL COMPUTING, 2022, 卷号: 111, 页码: 10
作者:  Wu, Yalan;  Wu, Jigang;  Liu, Peng;  Han, Yinhe;  Srikanthan, Thambipillai
收藏  |  浏览/下载:21/0  |  提交时间:2022/12/07
Mesh-connected processor array  Reconfiguration algorithm  Fault-tolerance  Synchronous communication  
Toward Efficient Computing for Robotics: From a Circuit and System View 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 卷号: 69, 期号: 7, 页码: 3051-3056
作者:  Xu, Haobo;  Yang, Yuxin;  Min, Feng;  Huang, Junpei;  Chen, Xiaoming;  Han, Yinhe;  Sun, Ninghui
收藏  |  浏览/下载:23/0  |  提交时间:2022/12/07
Robots  Kinematics  Planning  Field programmable gate arrays  Image edge detection  Estimation  Circuits and systems  Robotics  accelerator  hardware  kinematics  motion planning  perception  
Integrating Two Logics Into One Crossbar Array for Logic Gate Design 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 卷号: 68, 期号: 8, 页码: 2987-2991
作者:  Yao, Lian;  Liu, Peng;  Wu, Jigang;  Han, Yinhe;  Zhong, Yuehang;  You, Zhiqiang
收藏  |  浏览/下载:38/0  |  提交时间:2021/12/01
Logic gates  Memristors  Logic arrays  Resistance  Logic functions  Adders  Switches  Logic gates  memristive crossbar  material implication  not material implication  1-bit full adder  
Power and Area Efficient FPGA Building Blocks Based on Ferroelectric FETs 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019, 卷号: 66, 期号: 5, 页码: 1780-1793
作者:  Chen, Xiaoming;  Ni, Kai;  Niemier, Michael T.;  Han, Yinhe;  Datta, Suman;  Hu, Xiaobo Sharon
收藏  |  浏览/下载:83/0  |  提交时间:2019/08/16
Ferroelectric field-effect transistor (FeFET)  field-programmable gate array (FPGA)  lookup table (LUT)  routing switch  
VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 3, 页码: 858-870
作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:35/0  |  提交时间:2019/12/13
Cache design  fault tolerant  multi-V-dd  near-threshold voltage (NTV)  nonuniform cache access (NUCA)