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Frequency-Domain Inference Acceleration for Convolutional Neural Networks Using ReRAMs 期刊论文
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2023, 卷号: 34, 期号: 12, 页码: 3133-3146
作者:  Liu, Bosheng;  Jiang, Zhuoshen;  Wu, Yalan;  Wu, Jigang;  Chen, Xiaoming;  Liu, Peng;  Zhou, Qingguo;  Han, Yinhe
收藏  |  浏览/下载：8/0  |  提交时间：2023/12/04
Frequency-domain accelerator  energy efficiency  resistive random access memory  frequency-domain convolutions  
FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory Computing 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 9, 页码: 2889-2902
作者:  Liu, Rui;  Zhang, Xiaoyu;  Xie, Zhiwen;  Wang, Xinyu;  Li, Zerun;  Chen, Xiaoming;  Han, Yinhe;  Tang, Minghua
收藏  |  浏览/下载：9/0  |  提交时间：2023/12/04
Computing-in-memory (CiM)  cryptographic algorithm  ferroelectric field-effect transistor (FeFET)  instruc-tion set architecture (ISA)  
Dadu-SV: Accelerate Stereo Vision Processing on NPU 期刊论文
IEEE EMBEDDED SYSTEMS LETTERS, 2022, 卷号: 14, 期号: 4, 页码: 191-194
作者:  Min, Feng;  Wang, Ying;  Xu, Haobo;  Huang, Junpei;  Wang, Yujie;  Zou, Xingqi;  Lu, Meixuan;  Han, Yinhe
收藏  |  浏览/下载：14/0  |  提交时间：2023/07/12
Hardware acceleration  neural computing  neural processing unit (NPU)  semiglobal matching (SGM)  stereo vision  
Re-FeMAT: A Reconfigurable Multifunctional FeFET-Based Memory Architecture 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 11, 页码: 5071-5084
作者:  Zhang, Xiaoyu;  Liu, Rui;  Song, Tao;  Yang, Yuxin;  Han, Yinhe;  Chen, Xiaoming
收藏  |  浏览/下载：13/0  |  提交时间：2023/07/12
Convolutional neural network (CNN)  ferroelectric field-effect transistor (FeFET)  few-shot learning  in-memory processing  ternary content-addressable memory (TCAM)  
Search-Free Inference Acceleration for Sparse Convolutional Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 7, 页码: 2156-2169
作者:  Liu, Bosheng;  Chen, Xiaoming;  Han, Yinhe;  Wu, Jigang;  Chang, Liang;  Liu, Peng;  Xu, Haobo
收藏  |  浏览/下载：24/0  |  提交时间：2022/12/07
Internal interconnection  memory bandwidth  sparse accelerators  sparse convolution neural networks (CNNs)  
Fault Modeling and Efficient Testing of Memristor-Based Memory 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2021, 卷号: 68, 期号: 11, 页码: 4444-4455
作者:  Liu, Peng;  You, Zhiqiang;  Wu, Jigang;  Liu, Bosheng;  Han, Yinhe;  Chakrabarty, Krishnendu
收藏  |  浏览/下载：25/0  |  提交时间：2022/06/21
Electrical defects  fault model  defect-oriented testing  March algorithm  non-volatile memory  
Integrating Two Logics Into One Crossbar Array for Logic Gate Design 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 卷号: 68, 期号: 8, 页码: 2987-2991
作者:  Yao, Lian;  Liu, Peng;  Wu, Jigang;  Han, Yinhe;  Zhong, Yuehang;  You, Zhiqiang
收藏  |  浏览/下载：38/0  |  提交时间：2021/12/01
Logic gates  Memristors  Logic arrays  Resistance  Logic functions  Adders  Switches  Logic gates  memristive crossbar  material implication  not material implication  1-bit full adder  
Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology 期刊论文
SCIENCE CHINA-INFORMATION SCIENCES, 2021, 卷号: 64, 期号: 6, 页码: 10
作者:  Zou, Xingqi;  Xu, Sheng;  Chen, Xiaoming;  Yan, Liang;  Han, Yinhe
收藏  |  浏览/下载：41/0  |  提交时间：2021/12/01
processing-in-memory (PIM)  von Neumann bottleneck  memory wall  PIM simulator  architecture-level PIM  
Defect Analysis and Parallel Testing or 3D Hybrid CMOS-Memristor Memory 期刊论文
IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING, 2021, 卷号: 9, 期号: 2, 页码: 745-758
作者:  Liu, Peng;  You, Zhiqiang;  Wu, Jigang;  Elimu, Michael;  Wang, Weizheng;  Cai, Shuo;  Han, Yinhe
收藏  |  浏览/下载：33/0  |  提交时间：2021/12/01
Non-volatile memory  RRAM  CMOL  memristor  testing  
Power and Area Efficient FPGA Building Blocks Based on Ferroelectric FETs 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019, 卷号: 66, 期号: 5, 页码: 1780-1793
作者:  Chen, Xiaoming;  Ni, Kai;  Niemier, Michael T.;  Han, Yinhe;  Datta, Suman;  Hu, Xiaobo Sharon
收藏  |  浏览/下载：83/0  |  提交时间：2019/08/16
Ferroelectric field-effect transistor (FeFET)  field-programmable gate array (FPGA)  lookup table (LUT)  routing switch