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BitXpro: Regularity-Aware Hardware Runtime Pruning for Deep Neural Networks 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2023, 卷号: 31, 期号: 1, 页码: 90-103
作者:  Li, Hongyan;  Lu, Hang;  Wang, Haoxuan;  Deng, Shengji;  Li, Xiaowei
收藏  |  浏览/下载:13/0  |  提交时间:2023/07/12
Deep learning accelerator  deep neural network (DNN)  hardware runtime pruning  
Multi-Node Acceleration for Large-Scale GCNs 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2022, 卷号: 71, 期号: 12, 页码: 3140-3152
作者:  Sun, Gongjian;  Yan, Mingyu;  Wang, Duo;  Li, Han;  Li, Wenming;  Ye, Xiaochun;  Fan, Dongrui;  Xie, Yuan
收藏  |  浏览/下载:26/0  |  提交时间:2023/07/12
Deep learning  graph neural network  hardware accelerator  multi-node system  communication optimization  
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 10, 页码: 3400-3413
作者:  Liu, Cheng;  Chu, Cheng;  Xu, Dawen;  Wang, Ying;  Wang, Qianlong;  Li, Huawei;  Li, Xiaowei;  Cheng, Kwang-Ting
收藏  |  浏览/下载:26/0  |  提交时间:2022/12/07
Circuit faults  Computational modeling  Deep learning  Hardware  Redundancy  Neural networks  Computer architecture  Deep learning accelerator (DLA)  fault detection  fault tolerance  hybrid computing architecture (HyCA)  
An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 9, 页码: 2808-2820
作者:  Wang, Yongchen;  Wang, Ying;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:31/0  |  提交时间:2022/12/07
Streaming media  Neural networks  Image coding  Decoding  Metadata  Deep learning  Hardware  Neural network acceleration  specialized accelerator  video analysis  
Toward Efficient Computing for Robotics: From a Circuit and System View 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 卷号: 69, 期号: 7, 页码: 3051-3056
作者:  Xu, Haobo;  Yang, Yuxin;  Min, Feng;  Huang, Junpei;  Chen, Xiaoming;  Han, Yinhe;  Sun, Ninghui
收藏  |  浏览/下载:23/0  |  提交时间:2022/12/07
Robots  Kinematics  Planning  Field programmable gate arrays  Image edge detection  Estimation  Circuits and systems  Robotics  accelerator  hardware  kinematics  motion planning  perception  
An Efficient Full Hardware Implementation of Extended Merkle Signature Scheme 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2021, 页码: 12
作者:  Cao, Yuan;  Wu, Yanze;  Wang, Wen;  Lu, Xu;  Chen, Shuai;  Ye, Jing;  Chang, Chip-Hong
收藏  |  浏览/下载:24/0  |  提交时间:2022/06/21
Hardware  Random access memory  Software algorithms  Quantum computing  Field programmable gate arrays  Computers  NIST  Post-quantum cryptography  eXtended Merkle signature scheme  hardware accelerator  
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2021, 卷号: 70, 期号: 9, 页码: 1511-1525
作者:  Liang, Shengwen;  Wang, Ying;  Liu, Cheng;  He, Lei;  Li, Huawei;  Xu, Dawen;  Li, Xiaowei
收藏  |  浏览/下载:38/0  |  提交时间:2021/12/01
Neural networks  Hardware  System-on-chip  Task analysis  Feature extraction  Memory management  Graph neural network  accelerator architecture  hardware acceleration  
Practical Attacks on Deep Neural Networks by Memory Trojaning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 6, 页码: 1230-1243
作者:  Hu, Xing;  Zhao, Yang;  Deng, Lei;  Liang, Ling;  Zuo, Pengfei;  Ye, Jing;  Lin, Yingyan;  Xie, Yuan
收藏  |  浏览/下载:35/0  |  提交时间:2021/12/01
Trojan horses  Hardware  Integrated circuit modeling  Computational modeling  Security  Payloads  Convolutional neural networks (CNNs)  deep learning accelerator  deep learning attack  hardware Trojan  
Hardware Acceleration for GCNs via Bidirectional Fusion 期刊论文
IEEE COMPUTER ARCHITECTURE LETTERS, 2021, 卷号: 20, 期号: 1, 页码: 4
作者:  Li, Han;  Yan, Mingyu;  Yang, Xiaocheng;  Deng, Lei;  Li, Wenming;  Ye, Xiaochun;  Fan, Dongrui;  Xie, Yuan
收藏  |  浏览/下载:36/0  |  提交时间:2021/12/01
Random access memory  Computational modeling  Analytical models  Hardware  Engines  Computer architecture  Transforms  Graph convolutional neural networks  hardware accelerator  bidirectional execution  inter-phase fusion  
Architecting Effectual Computation for Machine Learning Accelerators 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 10, 页码: 2654-2667
作者:  Lu, Hang;  Zhang, Mingzhe;  Han, Yinhe;  Wang, Qi;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:89/0  |  提交时间:2020/12/10
Computational modeling  Throughput  Adders  Machine learning  Acceleration  Kernel  Computational efficiency  Accelerator architectures  neural network hardware  multiplying circuits