中国科学院计算技术研究所机构知识库

浏览/检索结果: 共6条，第1-6条

帮助

限定条件	作者：Li, Xiaowei    第一作者

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择期刊影响因子升序期刊影响因子降序发表日期升序发表日期降序提交时间升序提交时间降序作者升序作者降序WOS被引频次升序WOS被引频次降序题名升序题名降序
	An Edge 3D CNN Accelerator for Low-Power Activity Recognition 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 5, 页码: 918-930 作者:  Wang, Ying;  Wang, Yongchen;  Shi, Cong;  Cheng, Long;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：37/0  |  提交时间：2021/12/01 Three-dimensional displays  Two dimensional displays  Arrays  Feature extraction  System-on-chip  Redundancy  3D CNN  activity analysis  CNN accelerator  network-on-chip  video
	BZIP: A compact data memory system for UTXO-based blockchains 期刊论文 JOURNAL OF SYSTEMS ARCHITECTURE, 2020, 卷号: 109, 页码: 8 作者:  Jiang, Shuhao;  Li, Jiajun;  Gong, Shijun;  Yan, Junchao;  Yan, Guihai;  Sun, Yi;  Li, Xiaowei 收藏  |  浏览/下载：48/0  |  提交时间：2020/12/10 UTXO  Blockchain  Data Compression  IoT
	PUFPass: A password management mechanism based on software/hardware codesign 期刊论文 INTEGRATION-THE VLSI JOURNAL, 2019, 卷号: 64, 页码: 173-183 作者:  Guo, Qingli;  Ye, Jing;  Li, Bing;  Hu, Yu;  Li, Xiaowei;  Lan, Yazhu;  Zhang, Guohe 收藏  |  浏览/下载：69/0  |  提交时间：2019/04/03 Password  Password management mechanism  PUF  Security  Usability
	A Case of On-Chip Memory Subsystem Design for Low-Power CNN Accelerators 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 10, 页码: 1971-1984 作者:  Wang, Ying;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：68/0  |  提交时间：2019/12/10 Convolutional neural network (CNN)  deep learning  low power  memory subsystem
	VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 3, 页码: 858-870 作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：35/0  |  提交时间：2019/12/13 Cache design  fault tolerant  multi-V-dd  near-threshold voltage (NTV)  nonuniform cache access (NUCA)
	Enhanced Wear-Rate Leveling for PRAM Lifetime Improvement Considering Process Variation 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 1, 页码: 92-102 作者:  Han, Yinhe;  Dong, Jianbo;  Weng, Kaiheng;  Wang, Ying;  Li, Xiaowei 收藏  |  浏览/下载：42/0  |  提交时间：2019/12/13 Endurance  phase-change random access memory (PRAM)  wear leveling (WL)