CSpace

浏览/检索结果: 共7条,第1-7条 帮助

限定条件                        
已选(0)清除 条数/页:   排序方式:
Dadu-SV: Accelerate Stereo Vision Processing on NPU 期刊论文
IEEE EMBEDDED SYSTEMS LETTERS, 2022, 卷号: 14, 期号: 4, 页码: 191-194
作者:  Min, Feng;  Wang, Ying;  Xu, Haobo;  Huang, Junpei;  Wang, Yujie;  Zou, Xingqi;  Lu, Meixuan;  Han, Yinhe
收藏  |  浏览/下载:14/0  |  提交时间:2023/07/12
Hardware acceleration  neural computing  neural processing unit (NPU)  semiglobal matching (SGM)  stereo vision  
Amphis: Managing Reconfigurable Processor Architectures With Generative Adversarial Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 11, 页码: 3993-4003
作者:  Chen, Weiwei;  Wang, Ying;  Xu, Ying;  Gao, Chengsi;  Han, Yinhe;  Zhang, Lei
收藏  |  浏览/下载:14/0  |  提交时间:2023/07/12
Resource management  Predictive models  Runtime  Generators  Generative adversarial networks  Computational modeling  Training  Design space exploration  generative adversarial network (GAN)  reconfigurable processor  
LINAC: A Spatially Linear Accelerator for Convolutional Neural Networks 期刊论文
IEEE COMPUTER ARCHITECTURE LETTERS, 2022, 卷号: 21, 期号: 1, 页码: 29-32
作者:  Xiao, Hang;  Xu, Haobo;  Wang, Ying;  Wang, Yujie;  Han, Yinhe
收藏  |  浏览/下载:21/0  |  提交时间:2022/12/07
Linear particle accelerator  Correlation  Kernel  Convolution  Linear regression  System-on-chip  Quantization (signal)  Neural network  acceleration  convolution  linear regression  bit-sparsity  
PIMSim: A Flexible and Detailed Processing-in-Memory Simulator 期刊论文
IEEE COMPUTER ARCHITECTURE LETTERS, 2019, 卷号: 18, 期号: 1, 页码: 6-9
作者:  Xu, Sheng;  Chen, Xiaoming;  Wang, Ying;  Han, Yinhe;  Qian, Xuehai;  Li, Xiaowei
收藏  |  浏览/下载:80/0  |  提交时间:2019/04/03
Processing-in-memory  simulator  heterogeneous computing  memory system  
PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 5, 页码: 1613-1625
作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Zhang, Lei;  Cheng, Yuanqing;  Li, Xiaowei
收藏  |  浏览/下载:53/0  |  提交时间:2019/12/13
3-D integration  IR-drop  phase-change memory (PCM)  through-silicon-via (TSV)  write throughput  
Enhanced Wear-Rate Leveling for PRAM Lifetime Improvement Considering Process Variation 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 1, 页码: 92-102
作者:  Han, Yinhe;  Dong, Jianbo;  Weng, Kaiheng;  Wang, Ying;  Li, Xiaowei
收藏  |  浏览/下载:42/0  |  提交时间:2019/12/13
Endurance  phase-change random access memory (PRAM)  wear leveling (WL)  
RISO: Enforce Noninterfered Performance With Relaxed Network-on-Chip Isolation in Many-Core Cloud Processors 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2015, 卷号: 23, 期号: 12, 页码: 3053-3064
作者:  Lu, Hang;  Fu, Binzhang;  Wang, Ying;  Han, Yinhe;  Yan, Guihai;  Li, Xiaowei
收藏  |  浏览/下载:39/0  |  提交时间:2019/12/13
Cloud processor  networks-on-chip (NoCs)  performance isolation  relaxed isolation (RISO)  workload consolidation