中国科学院计算技术研究所机构知识库

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	In-Memory Wallace Tree Multipliers Based on Majority Gates Within Voltage-Gated SOT-MRAM Crossbar Arrays 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2024, 页码: 8 作者:  Hui, Yajuan;  Li, Qingzhen;  Wang, Leimin;  Liu, Cheng;  Zhang, Deming;  Miao, Xiangshui 收藏  |  浏览/下载：21/0  |  提交时间：2024/05/20 In-memory computing  majority gates  voltage-gated SOT-MRAM  Wallace tree multiplier
	Field-Free 3T2SOT MRAM for Non-Volatile Cache Memories 期刊论文 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 卷号: 67, 期号: 12, 页码: 4660-4669 作者:  Wu, Bi;  Wang, Chao;  Wang, Zhaohao;  Wang, Ying;  Zhang, Deming;  Liu, Dijun;  Zhang, Youguang;  Hu, Xiaobo Sharon 收藏  |  浏览/下载：47/0  |  提交时间：2021/12/01 Random access memory  Magnetic tunneling  Switches  Reliability  Tunneling magnetoresistance  Metals  Transistors  SOT-MRAM  low power  high speed  high reliability
	Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy 期刊论文 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 卷号: 67, 期号: 1, 页码: 108-120 作者:  Wu, Bi;  Dai, Pengcheng;  Wang, Zhaohao;  Wang, Chao;  Wang, Ying;  Yang, Jianlei;  Cheng, Yuanqing;  Liu, Dijun;  Zhang, Youguang;  Zhao, Weisheng;  Hu, Xiaobo Sharon 收藏  |  浏览/下载：58/0  |  提交时间：2020/12/10 NAND-SPIN  spin orbit torque (SOT) MRAM  last level cache  write throughput  high performance