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On Modeling and Detecting Trojans in Instruction Sets 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 10, 页码: 3226-3239
作者:  Zhang, Ying;  He, Aodi;  Li, Jiaying;  Rezine, Ahmed;  Peng, Zebo;  Larsson, Erik;  Yang, Tao;  Jiang, Jianhui;  Li, Huawei
收藏  |  浏览/下载：1/0  |  提交时间：2024/12/06
Trojan horses  Security  Program processors  Companies  Inspection  Hardware security  Reverse engineering  Deep test for security  hidden instruction Trojan (HIT)  unbounded model checking (UMC)  VLSI test  
Design of a Compact Superconducting RSFQ Register File 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2023, 页码: 8
作者:  Zhang, Kuozhong;  Zhang, Zhimin;  Tang, Guangming;  Ye, Xiaochun
收藏  |  浏览/下载：17/0  |  提交时间：2023/12/04
Registers  Clocks  Josephson junctions  Power transmission lines  Logic gates  Decoding  Program processors  RSFQ  register file  superconducting digital circuit  
Toward Developing High-Performance RISC-V Processors Using Agile Methodology 期刊论文
IEEE MICRO, 2023, 卷号: 43, 期号: 4, 页码: 98-106
作者:  Xu, Yinan;  Yu, Zihao;  Tang, Dan;  Cai, Ye;  Huan, Dandan;  He, Wei;  Sun, Ninghui;  Bao, Yungang
收藏  |  浏览/下载：15/0  |  提交时间：2023/12/04
Program processors  Behavioral sciences  Chip scale packaging  Microarchitecture  Hardware  Analytical models  Layout  
Self-Aware Neural Network Systems: A Survey and New Perspective 期刊论文
PROCEEDINGS OF THE IEEE, 2020, 卷号: 108, 期号: 7, 页码: 1047-1067
作者:  Du, Zidong;  Guo, Qi;  Zhao, Yongwei;  Chen, Yunji;  Xu, Zhiwei;  Zhi, Tian
收藏  |  浏览/下载：56/0  |  提交时间：2020/12/10
Artificial neural networks  Neurons  Self-aware  Monitoring  Sensors  Program processors  Logic gates  Self-aware neural network (NN) processors  
LPM: A Systematic Methodology for Concurrent Data Access Pattern Optimization from a Matching Perspective 期刊论文
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2019, 卷号: 30, 期号: 11, 页码: 2478-2493
作者:  Liu, Yuhang;  Sun, Xian-He
收藏  |  浏览/下载：47/0  |  提交时间：2020/12/10
Concurrent computing  Optimization  Delays  Program processors  Hardware  Systematics  Analytical models  Memory wall  memory stall time  efficiency  performance optimization  layered performance matching (LPM)  memory concurrency  
Shangri-la: Achieving high performance from compiled network applications while enabling ease of programming 期刊论文
ACM SIGPLAN NOTICES, 2005, 卷号: 40, 期号: 6, 页码: 224-236
作者:  Chen, MK;  Li, XF;  Lian, RQ;  Lin, JH;  Liu, LX;  Liu, T;  Ju, R
收藏  |  浏览/下载：45/0  |  提交时间：2019/12/16
packet processing  network processors  chip multiprocessors  throughput-oriented computing  program partitioning  dataflow programming