中国科学院计算技术研究所机构知识库

浏览/检索结果: 共13条，第1-10条

帮助

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择作者升序作者降序期刊影响因子升序期刊影响因子降序题名升序题名降序发表日期升序发表日期降序WOS被引频次升序WOS被引频次降序提交时间升序提交时间降序
	Chiplever: A Hardware-Software Co-Design Framework Toward Extension of Chiplet System for Fully Homomorphic Encryption 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2026, 卷号: 45, 期号: 2, 页码: 603-616 作者:  Du, Yibo;  Wang, Ying;  Wang, Mengdi;  Li, Xiaowei;  Han, Yinhe 收藏  |  浏览/下载：1/0  |  提交时间：2026/05/25 Hardware  Chiplets  Homomorphic encryption  Polynomials  Vectors  Scheduling algorithms  Noise  Program processors  Design automation  Computational efficiency  Chiplet  fully homomorphic encryption (FHE)  hardware-software co-design  heterogeneous architecture
	LayerTEE: Decoupled Memory Protection for Scalable Multilayer Communication on RISC-V 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2026, 卷号: 45, 期号: 1, 页码: 533-546 作者:  Pan, Shangjie;  Yang, Yinghao;  Peng, Xuanyao;  Zhao, Xiquan;  Du, Dong;  Lu, Hang;  Xia, Yubin;  Li, Xiaowei 收藏  |  浏览/下载：1/0  |  提交时间：2026/05/25 Cryptography  Security  Cloud computing  Scalability  Protection  Memory management  Hardware  Communication systems  Software  Program processors  Communication  memory isolation  RISC-V  trusted execution environment (TEE)
	Oxpecker: Leaking Secrets via Fetch Target Queue 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 7, 页码: 2461-2474 作者:  Li, Shan;  Xu, Zheliang;  Shen, Haihua;  Li, Huawei 收藏  |  浏览/下载：24/0  |  提交时间：2025/12/03 Program processors  Prefetching  Security  Pipelines  Integrated circuits  Design automation  Prevention and mitigation  Manuals  Decoding  Optimization  Branch prediction unit (BPU)  fetch target queue (FTQ)  front-end  hardware security  instruction fetch unit  instruction prefetcher
	Balancing Graph Processing Workloads in Heterogeneous CPU-PIM Systems 期刊论文 IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING, 2025, 卷号: 13, 期号: 3, 页码: 1068-1082 作者:  Xu, Sheng;  Li, Chun;  Luo, Le;  Zheng, Ming;  Yan, Liang;  Zou, Xingqi;  Chen, Xiaoming 收藏  |  浏览/下载：24/0  |  提交时间：2025/12/03 Program processors  Logic  Codes  Annotations  Synchronization  Resource management  Parallel processing  Programming  Hardware  Energy consumption  Processing-in-Memory  workload balance  graph processing  heterogeneous system
	XiangShan: An Open Source Project for High-Performance RISC-V Processors Meeting Industrial-Grade Standards 期刊论文 IEEE MICRO, 2025, 卷号: 45, 期号: 3, 页码: 49-57 作者:  Wang, Kaifan;  Chen, Jian;  Xu, Yinan;  Yu, Zihao;  He, Wei;  Tang, Dan;  Sun, Ninghui;  Bao, Yungang 收藏  |  浏览/下载：22/0  |  提交时间：2025/12/03 Program processors  Vectors  Technological innovation  Pipelines  Microarchitecture  Ecosystems  Decoding  Training  Registers  Industries
	Identifying Optimal Workload Offloading Partitions for CPU-PIM Graph Processing Accelerators 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2025, 页码: 12 作者:  Xu, Sheng;  Li, Chun;  Luo, Le;  Zhou, Wu;  Yan, Liang;  Chen, Xiaoming 收藏  |  浏览/下载：30/0  |  提交时间：2025/06/25 Program processors  Logic  Codes  Arrays  Runtime  Electronic mail  Accuracy  Very large scale integration  Training  Through-silicon vias  Graph processing  heterogenous systems  processing-in-memory (PIM)  reuse distance (RD)  workload offloading
	RIVL: A Low-Cost SoC Agile Development Platform for Multiple RISC-V Processors Design and Verification 期刊论文 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024, 页码: 11 作者:  Xu, Lida;  Cao, Zewen;  Zhao, Hualong;  Peng, Zhuo;  Miao, Yuchi;  Zhuang, Chunan;  Ruan, Hongrui;  Dong, Yuying;  Zeng, Chuanbin;  Li, Bo;  Luo, Jiajun 收藏  |  浏览/下载：52/0  |  提交时间：2025/06/25 Program processors  Hardware  Chip scale packaging  Design methodology  Costs  Object oriented modeling  Complexity theory  Testing  Registers  Prototypes  Agile methodology  object-oriented hardware  RISC-V  low-cost  integration  verification  open source
	On Modeling and Detecting Trojans in Instruction Sets 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 10, 页码: 3226-3239 作者:  Zhang, Ying;  He, Aodi;  Li, Jiaying;  Rezine, Ahmed;  Peng, Zebo;  Larsson, Erik;  Yang, Tao;  Jiang, Jianhui;  Li, Huawei 收藏  |  浏览/下载：51/0  |  提交时间：2024/12/06 Trojan horses  Security  Program processors  Companies  Inspection  Hardware security  Reverse engineering  Deep test for security  hidden instruction Trojan (HIT)  unbounded model checking (UMC)  VLSI test
	Design of a Compact Superconducting RSFQ Register File 期刊论文 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2023, 页码: 8 作者:  Zhang, Kuozhong;  Zhang, Zhimin;  Tang, Guangming;  Ye, Xiaochun 收藏  |  浏览/下载：66/0  |  提交时间：2023/12/04 Registers  Clocks  Josephson junctions  Power transmission lines  Logic gates  Decoding  Program processors  RSFQ  register file  superconducting digital circuit
	Toward Developing High-Performance RISC-V Processors Using Agile Methodology 期刊论文 IEEE MICRO, 2023, 卷号: 43, 期号: 4, 页码: 98-106 作者:  Xu, Yinan;  Yu, Zihao;  Tang, Dan;  Cai, Ye;  Huan, Dandan;  He, Wei;  Sun, Ninghui;  Bao, Yungang 收藏  |  浏览/下载：66/0  |  提交时间：2023/12/04 Program processors  Behavioral sciences  Chip scale packaging  Microarchitecture  Hardware  Analytical models  Layout