CSpace  > 中国科学院计算技术研究所期刊论文  > 英文
Toward Developing High-Performance RISC-V Processors Using Agile Methodology
Xu, Yinan1; Yu, Zihao; Tang, Dan2; Cai, Ye3; Huan, Dandan4; He, Wei5; Sun, Ninghui1; Bao, Yungang1
2023-07-01
发表期刊IEEE MICRO
ISSN0272-1732
卷号43期号:4页码:98-106
摘要Agile chip design methodology has shown promise for sustaining the scaling of computing performance more efficiently. However, the practical application of this methodology has been limited by major obstacles. This article presents MinJie, an open source platform supporting agile hardware development flow. We demonstrate the usage and effectiveness of MinJie by building two generations of XiangShan, an open source RISC-V processor with industry-competitive performance. This article highlights the potential impact of MinJie and XiangShan in advancing the field of agile processor design and development as well as the potential for open source collaboration to democratize the field and drive innovation forward.
关键词Program processors Behavioral sciences Chip scale packaging Microarchitecture Hardware Analytical models Layout
DOI10.1109/MM.2023.3273562
收录类别SCI
语种英语
资助项目Strategic Priority Research Program of Chinese Academy of Sciences[XDC05030200] ; National Key Ramp;D Program of China[2022YFB4500403] ; National Natural Science Foundation of China[62090022] ; National Natural Science Foundation of China[62172388] ; National Natural Science Foundation of China[62072433] ; Youth Innovation Promotion Association of the Chinese Academy of Sciences[2020105] ; Institute of Computing Technology (ICT) Innovation Grant[E261100] ; Fundamental Research Funds for the Central Universities[DUT21RC(3)102] ; Fundamental Research Funds for the Central Universities[DUT21LAB302]
WOS研究方向Computer Science
WOS类目Computer Science, Hardware & Architecture ; Computer Science, Software Engineering
WOS记录号WOS:001021366700012
出版者IEEE COMPUTER SOC
引用统计
被引频次:2[WOS]   [WOS记录]     [WOS相关记录]
文献类型期刊论文
条目标识符http://119.78.100.204/handle/2XEOYT63/21260
专题中国科学院计算技术研究所期刊论文_英文
通讯作者Xu, Yinan
作者单位1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Processors, Beijing 100190, Peoples R China
2.Beijing Inst Open Source Chip, Beijing 100080, Peoples R China
3.Shenzhen Univ, Shenzhen 518060, Peoples R China
4.Beijing VCore Technol, Beijing 100190, Peoples R China
5.Peng Cheng Lab, Shenzhen, Peoples R China
推荐引用方式
GB/T 7714
Xu, Yinan,Yu, Zihao,Tang, Dan,et al. Toward Developing High-Performance RISC-V Processors Using Agile Methodology[J]. IEEE MICRO,2023,43(4):98-106.
APA Xu, Yinan.,Yu, Zihao.,Tang, Dan.,Cai, Ye.,Huan, Dandan.,...&Bao, Yungang.(2023).Toward Developing High-Performance RISC-V Processors Using Agile Methodology.IEEE MICRO,43(4),98-106.
MLA Xu, Yinan,et al."Toward Developing High-Performance RISC-V Processors Using Agile Methodology".IEEE MICRO 43.4(2023):98-106.
条目包含的文件
条目无相关文件。
个性服务
推荐该条目
保存到收藏夹
查看访问统计
导出为Endnote文件
谷歌学术
谷歌学术中相似的文章
[Xu, Yinan]的文章
[Yu, Zihao]的文章
[Tang, Dan]的文章
百度学术
百度学术中相似的文章
[Xu, Yinan]的文章
[Yu, Zihao]的文章
[Tang, Dan]的文章
必应学术
必应学术中相似的文章
[Xu, Yinan]的文章
[Yu, Zihao]的文章
[Tang, Dan]的文章
相关权益政策
暂无数据
收藏/分享
所有评论 (0)
暂无评论
 

除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。