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GRACE: An End-to-End Graph Processing Accelerator on FPGA With Graph Reordering Engine 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 10, 页码: 3816-3829
作者:  Fan, Haishuang;  Meng, Rui;  Sun, Qichu;  Wu, Jingya;  Lu, Wenyan;  Li, Xiaowei;  Yan, Guihai
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
Field programmable gate arrays  Redundancy  Indexes  Graphics processing units  Central Processing Unit  Integrated circuit modeling  Computational modeling  Engines  Design automation  Data models  Accelerator  FPGA  Graph processing  
Co-ViSu: Accelerating Video Super-Resolution With Codec Information Reuse 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3451-3464
作者:  Fan, Haishuang;  Sun, Qichu;  Wu, Jingya;  Lu, Wenyan;  Li, Xiaowei;  Yan, Guihai
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
Binary sequences  Streaming media  Decoding  Artificial neural networks  Superresolution  Kernel  Engines  Design automation  Video codecs  Throughput  Accelerator  codec  FPGA  super-resolution (SR)  
SiHGNN: Leveraging Properties of Semantic Graphs for Efficient HGNN Acceleration 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3490-3503
作者:  Xue, Runzhen;  Yan, Mingyu;  Han, Dengke;  Xiao, Ziheng;  Tang, Zhimin;  Ye, Xiaochun;  Fan, Dongrui
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
Semantics  Layout  Graph neural networks  Optimization  Vectors  Graphics processing units  Feature extraction  Design automation  Training  Hardware acceleration  Graph neural network (GNN)  hardware accelerator  heterogeneous graph neural network (HGNN)  semantic graph  
A 36 mJ/Inf Convolution Accelerator With Reduced Memory Access and Regrouped Sparse Kernels for Environment Sound Classification on Edge Devices 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2025, 卷号: 72, 期号: 9, 页码: 1258-1262
作者:  Feng, Lichen;  Wang, Tao;  Cai, Rundong;  Min, Feng;  Zhu, Zhangming
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
Accuracy  Convolution  Kernel  Computational modeling  Shape  Feature extraction  Timing  Frequency modulation  Power demand  Pipelines  Convolution accelerator  depthwise separable pipeline  environment sound classification  sparse kernel  
DNA: A General Dynamic Neural Network Accelerator 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 9, 页码: 3210-3222
作者:  Liu, Lian;  Yu, Jinxin;  Wang, Mengdi;  Li, Xiaowei;  Han, Yinhe;  Wang, Ying
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
Dynamic scheduling  Artificial neural networks  DNA  Processor scheduling  Loading  Prefetching  Runtime  Costs  Switches  Optimization  Dynamic NN  NPU design  accelerator  
GenCNN: A Partition-Aware Multi-Objective Mapping Framework for CNN Accelerators Based on Genetic Algorithm 期刊论文
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2025, 卷号: 22, 期号: 3, 页码: 26
作者:  Mu, Yudong;  Fan, Zhihua;  Li, Wenming;  Zhang, Zhiyuan;  An, Xuejun;  Fan, Dongrui;  Ye, Xiaochun
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
CNN Accelerator  Dataflow Graph Mapping  Genetic Algorithm  Multi-objective Optimization  
Low-Latency PIM Accelerator for Edge LLM Inference 期刊论文
IEEE COMPUTER ARCHITECTURE LETTERS, 2025, 卷号: 24, 期号: 2, 页码: 321-324
作者:  Wang, Xinyu;  Sun, Xiaotian;  Li, Wanqian;  Min, Feng;  Zhang, Xiaoyu;  Zhang, Xinjiang;  Han, Yinhe;  Chen, Xiaoming
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
Random access memory  Low latency communication  Engines  Bandwidth  Vectors  Registers  Quantization (signal)  Energy efficiency  Hardware  Computational modeling  Large language model inference  processing-in-memory  edge accelerator  
PIMCOMP: An End-to-End DNN Compiler for Processing-In-Memory Accelerators 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 5, 页码: 1745-1759
作者:  Sun, Xiaotian;  Wang, Xinyu;  Li, Wanqian;  Han, Yinhe;  Chen, Xiaoming
收藏  |  浏览/下载：38/0  |  提交时间：2025/06/25
Hardware  Optimization  Artificial neural networks  Pipelines  Parallel processing  Biological system modeling  Resource management  Adaptation models  Scheduling  Memory management  Deep neural network (DNN)  end-to-end compiler  processing-in-memory (PIM) accelerator  system-level optimization  
HEAT: Efficient Vision Transformer Accelerator With Hybrid-Precision Quantization 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2025, 卷号: 72, 期号: 5, 页码: 758-762
作者:  Zhao, Pan;  Xue, Donghui;  Wu, Licheng;  Chang, Liang;  Tan, Haining;  Han, Yinhe;  Zhou, Jun
收藏  |  浏览/下载：16/0  |  提交时间：2025/06/25
Vision transformer  accelerator  hybrid-precision quantization  FPGA  Vision transformer  accelerator  hybrid-precision quantization  FPGA  
Trident: The Acceleration Architecture for High-Performance Private Set Intersection 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 4, 页码: 1152-1167
作者:  Zhang, Jinkai;  Yang, Yinghao;  Zhou, Zhe;  Hu, Zhicheng;  Zhao, Xin;  Chang, Liang;  Lu, Hang;  Li, Xiaowei
收藏  |  浏览/下载：38/0  |  提交时间：2025/06/25
Protocols  Receivers  Cryptography  Hardware  Central Processing Unit  Random access memory  Data privacy  Polynomials  Field programmable gate arrays  Computer architecture  Private set intersection (PSI)  fully homomorphic encryption (FHE)  FPGA accelerator  privacy computing