中国科学院计算技术研究所机构知识库

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限定条件	出处：IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择期刊影响因子升序期刊影响因子降序发表日期升序发表日期降序提交时间升序提交时间降序作者升序作者降序WOS被引频次升序WOS被引频次降序题名升序题名降序
	Mortar-FP8: Morphing the Existing FP32 Infrastructure for High-Performance Deep Learning Acceleration 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 3, 页码: 878-891 作者:  Li, Hongyan;  Lu, Hang;  Li, Xiaowei 收藏  |  浏览/下载：2/0  |  提交时间：2024/05/20 Deep learning accelerator  deep neural network (DNN)  fp8 format
	Real-Time Robust Video Object Detection System Against Physical-World Adversarial Attacks 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 1, 页码: 366-379 作者:  Han, Husheng;  Hu, Xing;  Hao, Yifan;  Xu, Kaidi;  Dang, Pucheng;  Wang, Ying;  Zhao, Yongwei;  Du, Zidong;  Guo, Qi;  Wang, Yanzhi;  Zhang, Xishan;  Chen, Tianshi 收藏  |  浏览/下载：3/0  |  提交时间：2024/05/20 Object detection  Streaming media  Optical flow  Feature extraction  Real-time systems  Task analysis  Detectors  Adversarial patch attack  deep learning security  domain-specific accelerator  hardware/software co-design  real time
	Poseidon-NDP: Practical Fully Homomorphic Encryption Accelerator Based on Near Data Processing Architecture 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 12, 页码: 4749-4762 作者:  Yang, Yinghao;  Lu, Hang;  Li, Xiaowei 收藏  |  浏览/下载：6/0  |  提交时间：2024/05/20 FPGA accelerator  fully homomorphic encryption (FHE)  near data processing (NDP)  privacy computing
	HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 10, 页码: 3400-3413 作者:  Liu, Cheng;  Chu, Cheng;  Xu, Dawen;  Wang, Ying;  Wang, Qianlong;  Li, Huawei;  Li, Xiaowei;  Cheng, Kwang-Ting 收藏  |  浏览/下载：26/0  |  提交时间：2022/12/07 Circuit faults  Computational modeling  Deep learning  Hardware  Redundancy  Neural networks  Computer architecture  Deep learning accelerator (DLA)  fault detection  fault tolerance  hybrid computing architecture (HyCA)
	An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 9, 页码: 2808-2820 作者:  Wang, Yongchen;  Wang, Ying;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：31/0  |  提交时间：2022/12/07 Streaming media  Neural networks  Image coding  Decoding  Metadata  Deep learning  Hardware  Neural network acceleration  specialized accelerator  video analysis
	Rubik: A Hierarchical Architecture for Efficient Graph Neural Network Training 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 4, 页码: 936-949 作者:  Chen, Xiaobing;  Wang, Yuke;  Xie, Xinfeng;  Hu, Xing;  Basak, Abanti;  Liang, Ling;  Yan, Mingyu;  Deng, Lei;  Ding, Yufei;  Du, Zidong;  Xie, Yuan 收藏  |  浏览/下载：21/0  |  提交时间：2022/12/07 Deep learning accelerator  graph neural network (GNN)
	Cambricon-G: A Polyvalent Energy-Efficient Accelerator for Dynamic Graph Neural Networks 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 1, 页码: 116-128 作者:  Song, Xinkai;  Zhi, Tian;  Fan, Zhe;  Zhang, Zhenxing;  Zeng, Xi;  Li, Wei;  Hu, Xing;  Du, Zidong;  Guo, Qi;  Chen, Yunji 收藏  |  浏览/下载：29/0  |  提交时间：2022/06/21 Accelerator  architecture  graph neural networks (GNNs)
	Practical Attacks on Deep Neural Networks by Memory Trojaning 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 6, 页码: 1230-1243 作者:  Hu, Xing;  Zhao, Yang;  Deng, Lei;  Liang, Ling;  Zuo, Pengfei;  Ye, Jing;  Lin, Yingyan;  Xie, Yuan 收藏  |  浏览/下载：35/0  |  提交时间：2021/12/01 Trojan horses  Hardware  Integrated circuit modeling  Computational modeling  Security  Payloads  Convolutional neural networks (CNNs)  deep learning accelerator  deep learning attack  hardware Trojan
	An Edge 3D CNN Accelerator for Low-Power Activity Recognition 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 5, 页码: 918-930 作者:  Wang, Ying;  Wang, Yongchen;  Shi, Cong;  Cheng, Long;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：37/0  |  提交时间：2021/12/01 Three-dimensional displays  Two dimensional displays  Arrays  Feature extraction  System-on-chip  Redundancy  3D CNN  activity analysis  CNN accelerator  network-on-chip  video
	Swallow: A Versatile Accelerator for Sparse Neural Networks 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4881-4893 作者:  Liu, Bosheng;  Chen, Xiaoming;  Han, Yinhe;  Xu, Haobo 收藏  |  浏览/下载：28/0  |  提交时间：2021/12/01 Accelerator  convolutional (Conv) layers  fully connected (FC) layers  sparse neural networks (SNNs)