中国科学院计算技术研究所机构知识库

浏览/检索结果: 共6条，第1-6条

帮助

限定条件	作者：Li, Xiaowei    第一作者    发表日期：2016

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择期刊影响因子升序期刊影响因子降序发表日期升序发表日期降序提交时间升序提交时间降序作者升序作者降序WOS被引频次升序WOS被引频次降序题名升序题名降序
	Functional Test Generation for Hard-to-Reach States Using Path Constraint Solving 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2016, 卷号: 35, 期号: 6, 页码: 999-1011 作者:  Zhou, Yanhong;  Wang, Tiancheng;  Li, Huawei;  Lv, Tao;  Li, Xiaowei 收藏  |  浏览/下载：65/0  |  提交时间：2019/12/13 Abstraction-guided simulation  functional test generation  hard-to-reach states  path constraint solving
	DTMAC: A Delay Tolerant MAC Protocol for Underwater Wireless Sensor Networks 期刊论文 IEEE SENSORS JOURNAL, 2016, 卷号: 16, 期号: 11, 页码: 4137-4146 作者:  Li, Chao;  Xu, Yongju;  Xu, Chaonong;  An, Zhulin;  Diao, Boyu;  Li, Xiaowei 收藏  |  浏览/下载：39/0  |  提交时间：2019/12/13 Propagation delay  MAC  swarm mobility  sparse network  RTS/CTS  underwater wireless sensor networks
	PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 5, 页码: 1613-1625 作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Zhang, Lei;  Cheng, Yuanqing;  Li, Xiaowei 收藏  |  浏览/下载：53/0  |  提交时间：2019/12/13 3-D integration  IR-drop  phase-change memory (PCM)  through-silicon-via (TSV)  write throughput
	VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 3, 页码: 858-870 作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：35/0  |  提交时间：2019/12/13 Cache design  fault tolerant  multi-V-dd  near-threshold voltage (NTV)  nonuniform cache access (NUCA)
	Abstraction-Guided Simulation Using Markov Analysis for Functional Verification 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2016, 卷号: 35, 期号: 2, 页码: 285-297 作者:  Wang, Jian;  Li, Huawei;  Lv, Tao;  Wang, Tiancheng;  Li, Xiaowei;  Kundu, Sandip 收藏  |  浏览/下载：40/0  |  提交时间：2019/12/13 Abstraction-guided simulation  Markov analysis  semi-formal verification
	Enhanced Wear-Rate Leveling for PRAM Lifetime Improvement Considering Process Variation 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 1, 页码: 92-102 作者:  Han, Yinhe;  Dong, Jianbo;  Weng, Kaiheng;  Wang, Ying;  Li, Xiaowei 收藏  |  浏览/下载：42/0  |  提交时间：2019/12/13 Endurance  phase-change random access memory (PRAM)  wear leveling (WL)