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中国科学院计算技术研究所机构知识库
Institute of Computing Technology, Chinese Academy IR
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中国科学院计算技术... [13]
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浏览/检索结果:
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Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses
期刊论文
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2023, 卷号: 28, 期号: 4, 页码: 23
作者:
Chu, Cheng
;
Liu, Cheng
;
Xu, Dawen
;
Wang, Ying
;
Luo, Tao
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:7/0
  |  
提交时间:2023/12/04
Deformable convolution network
neural network accelerator
irregular memory access
runtime tile scheduling
Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 7, 页码: 2115-2127
作者:
He, Yintao
;
Wang, Ying
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:27/0
  |  
提交时间:2022/12/07
Computer architecture
Microprocessors
Resistance
Power demand
Training
Biological neural networks
Optimization
Low power (LP)
neural networks
processing-in-memory
resistive random-access memory (RRAM)
CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures
期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2022, 卷号: 71, 期号: 7, 页码: 1626-1639
作者:
Zou, Kaiwei
;
Wang, Ying
;
Cheng, Long
;
Qu, Songyun
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:29/0
  |  
提交时间:2022/12/07
Kernel
Computer architecture
Multicore processing
Deep learning
System-on-chip
Parallel processing
Real-time systems
Neural networks
parallel processing
real-time and embedded systems
single-chip multiprocessors
reinforcement learning
structured sparsity
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks
期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2021, 卷号: 70, 期号: 9, 页码: 1511-1525
作者:
Liang, Shengwen
;
Wang, Ying
;
Liu, Cheng
;
He, Lei
;
Li, Huawei
;
Xu, Dawen
;
Li, Xiaowei
收藏
  |  
浏览/下载:38/0
  |  
提交时间:2021/12/01
Neural networks
Hardware
System-on-chip
Task analysis
Feature extraction
Memory management
Graph neural network
accelerator architecture
hardware acceleration
An Edge 3D CNN Accelerator for Low-Power Activity Recognition
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 5, 页码: 918-930
作者:
Wang, Ying
;
Wang, Yongchen
;
Shi, Cong
;
Cheng, Long
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:37/0
  |  
提交时间:2021/12/01
Three-dimensional displays
Two dimensional displays
Arrays
Feature extraction
System-on-chip
Redundancy
3D CNN
activity analysis
CNN accelerator
network-on-chip
video
A Case of On-Chip Memory Subsystem Design for Low-Power CNN Accelerators
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 10, 页码: 1971-1984
作者:
Wang, Ying
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:68/0
  |  
提交时间:2019/12/10
Convolutional neural network (CNN)
deep learning
low power
memory subsystem
A Low Overhead In-Network Data Compressor for the Memory Hierarchy of Chip Multiprocessors
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 6, 页码: 1265-1277
作者:
Wang, Ying
;
Li, Huawei
;
Han, Yinhe
;
Li, Xiaowei
收藏
  |  
浏览/下载:67/0
  |  
提交时间:2019/12/10
Cache
chip multiprocessor (CMP)
compression
memory hierarchy
network-on-chip (NoC)
Resilience-Aware Frequency Tuning for Neural-Network-Based Approximate Computing Chips
期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 10, 页码: 2736-2748
作者:
Wang, Ying
;
Deng, Jiachao
;
Fang, Yuntan
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:53/0
  |  
提交时间:2019/12/12
Deep learning
error tolerance
neural network (NN)
timing variation
STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator
期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 4, 页码: 1285-1296
作者:
Song, Lili
;
Wang, Ying
;
Han, Yinhe
;
Li, Huawei
;
Cheng, Yuanqing
;
Li, Xiaowei
收藏
  |  
浏览/下载:70/0
  |  
提交时间:2019/12/12
Approximate computing
machine learning
neural network
spin toque transfer RAM (STT-RAM)
RISO: Enforce Noninterfered Performance With Relaxed Network-on-Chip Isolation in Many-Core Cloud Processors
期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2015, 卷号: 23, 期号: 12, 页码: 3053-3064
作者:
Lu, Hang
;
Fu, Binzhang
;
Wang, Ying
;
Han, Yinhe
;
Yan, Guihai
;
Li, Xiaowei
收藏
  |  
浏览/下载:39/0
  |  
提交时间:2019/12/13
Cloud processor
networks-on-chip (NoCs)
performance isolation
relaxed isolation (RISO)
workload consolidation