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Reconfiguration algorithms for synchronous communication on switch based degradable arrays 期刊论文
PARALLEL COMPUTING, 2022, 卷号: 111, 页码: 10
作者:  Wu, Yalan;  Wu, Jigang;  Liu, Peng;  Han, Yinhe;  Srikanthan, Thambipillai
收藏  |  浏览/下载:21/0  |  提交时间:2022/12/07
Mesh-connected processor array  Reconfiguration algorithm  Fault-tolerance  Synchronous communication  
Fault Modeling and Efficient Testing of Memristor-Based Memory 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2021, 卷号: 68, 期号: 11, 页码: 4444-4455
作者:  Liu, Peng;  You, Zhiqiang;  Wu, Jigang;  Liu, Bosheng;  Han, Yinhe;  Chakrabarty, Krishnendu
收藏  |  浏览/下载:25/0  |  提交时间:2022/06/21
Electrical defects  fault model  defect-oriented testing  March algorithm  non-volatile memory  
VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 3, 页码: 858-870
作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:35/0  |  提交时间:2019/12/13
Cache design  fault tolerant  multi-V-dd  near-threshold voltage (NTV)  nonuniform cache access (NUCA)  
SVFD: A Versatile Online Fault Detection Scheme via Checking of Stability Violation 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2011, 卷号: 19, 期号: 9, 页码: 1627-1640
作者:  Yan, Guihai;  Han, Yinhe;  Li, Xiaowei
收藏  |  浏览/下载:67/0  |  提交时间:2019/12/16
Aging  delay fault  online fault detection  soft error  stability violation  
A New Multiple-Round Dimension-Order Routing for Networks-on-Chip 期刊论文
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2011, 卷号: E94D, 期号: 4, 页码: 809-821
作者:  Fu, Binzhang;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:70/0  |  提交时间:2019/12/16
network-on-chip (NoC)  fault-tolerant routing  multiple round dimension-order routing  turn model  
Performance-asymmetry-aware scheduling for Chip Multiprocessors with static core coupling 期刊论文
JOURNAL OF SYSTEMS ARCHITECTURE, 2010, 卷号: 56, 期号: 10, 页码: 534-542
作者:  Dong, Jianbo;  Zhang, Lei;  Han, Yinhe;  Yan, Guihai;  Li, Xiaowei
收藏  |  浏览/下载:40/0  |  提交时间:2019/12/16
Process variation  Thread-level redundancy  Chip Multiprocessor  Scheduling  
On Topology Reconfiguration for Defect-Tolerant NoC-Based Homogeneous Manycore Systems 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2009, 卷号: 17, 期号: 9, 页码: 1173-1186
作者:  Zhang, Lei;  Han, Yinhe;  Xu, Qiang;  Li, Xiao wei;  Li, Huawei
收藏  |  浏览/下载:38/0  |  提交时间:2019/12/16
Defect tolerance  manycore system  network-on-chip  core-level redundancy  topology reconfiguration  
Compression/scan co-design for reducing test data volume, scan-in power dissipation, and test application time 期刊论文
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2006, 卷号: E89D, 期号: 10, 页码: 2616-2625
作者:  Hu, Yu;  Han, Yinhe;  Li, Xiaowei;  Li, Huawei;  Wen, Xiaoqing
收藏  |  浏览/下载:45/0  |  提交时间:2019/12/16
compression  run-length coding  random access scan  power dissipation  test application time