中国科学院计算技术研究所机构知识库

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限定条件	收录类别：SCI    出处：IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS    作者：Li, Huawei    第一作者    文献类型：期刊论文

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择期刊影响因子升序期刊影响因子降序发表日期升序发表日期降序提交时间升序提交时间降序作者升序作者降序WOS被引频次升序WOS被引频次降序题名升序题名降序
	PDG: A Prefetcher for Dynamic Graph Updating 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 4, 页码: 1246-1259 作者:  Zhang, Xinmiao;  Liu, Cheng;  Ni, Jiacheng;  Cheng, Yuanqing;  Zhang, Lei;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：3/0  |  提交时间：2024/05/20 Prefetching  Arrays  Optimization  Runtime  Heuristic algorithms  Computers  Monitoring  Computer architecture  data prefetching  memory system
	Statistical Modeling of Soft Error Influence on Neural Networks 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 11, 页码: 4152-4163 作者:  Huang, Haitong;  Xue, Xinghua;  Liu, Cheng;  Wang, Ying;  Luo, Tao;  Cheng, Long;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：2/0  |  提交时间：2024/05/20 Fault analysis  fault simulation  neural network (NN) reliability  statistical fault modeling
	Scalable and Conflict-Free NTT Hardware Accelerator Design: Methodology, Proof, and Implementation 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 5, 页码: 1504-1517 作者:  Mu, Jianan;  Ren, Yi;  Wang, Wen;  Hu, Yizhong;  Chen, Shuai;  Chang, Chip-Hong;  Fan, Junfeng;  Ye, Jing;  Cao, Yuan;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：9/0  |  提交时间：2023/12/04 Memory access pattern  number theoretic transform (NTT)  post-quantum cryptography (PQC)  scalable hardware design
	An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 9, 页码: 2808-2820 作者:  Wang, Yongchen;  Wang, Ying;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：31/0  |  提交时间：2022/12/07 Streaming media  Neural networks  Image coding  Decoding  Metadata  Deep learning  Hardware  Neural network acceleration  specialized accelerator  video analysis
	Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 7, 页码: 2115-2127 作者:  He, Yintao;  Wang, Ying;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：28/0  |  提交时间：2022/12/07 Computer architecture  Microprocessors  Resistance  Power demand  Training  Biological neural networks  Optimization  Low power (LP)  neural networks  processing-in-memory  resistive random-access memory (RRAM)
	A Fast Precision Tuning Solution for Always-On DNN Accelerators 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 5, 页码: 1236-1248 作者:  Wang, Ying;  He, Yintao;  Cheng, Long;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：25/0  |  提交时间：2022/12/07 Computer architecture  Neural networks  Computational modeling  Approximate computing  Tuning  Switches  Microprocessors  Always-on  CNN  computing-in-memory (CiM)  resistive RAM
	An Edge 3D CNN Accelerator for Low-Power Activity Recognition 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 5, 页码: 918-930 作者:  Wang, Ying;  Wang, Yongchen;  Shi, Cong;  Cheng, Long;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：37/0  |  提交时间：2021/12/01 Three-dimensional displays  Two dimensional displays  Arrays  Feature extraction  System-on-chip  Redundancy  3D CNN  activity analysis  CNN accelerator  network-on-chip  video
	A Guaranteed Secure Scan Design Based on Test Data Obfuscation by Cryptographic Hash 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4524-4536 作者:  Cui, Aijiao;  Li, Mengyang;  Qu, Gang;  Li, Huawei 收藏  |  浏览/下载：29/0  |  提交时间：2021/12/01 Ciphers  Encryption  Integrated circuits  Side-channel attacks  Testing  Cryptographic hash function  obfuscation logic  scan design  scan-based side-channel attack
	Architecting Effectual Computation for Machine Learning Accelerators 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 10, 页码: 2654-2667 作者:  Lu, Hang;  Zhang, Mingzhe;  Han, Yinhe;  Wang, Qi;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：89/0  |  提交时间：2020/12/10 Computational modeling  Throughput  Adders  Machine learning  Acceleration  Kernel  Computational efficiency  Accelerator architectures  neural network hardware  multiplying circuits
	Software-Based Self-Testing Using Bounded Model Checking for Out-of-Order Superscalar Processors 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 3, 页码: 714-727 作者:  Zhang, Ying;  Chakrabarty, Krishnendu;  Peng, Zebo;  Rezine, Ahmed;  Li, Huawei;  Eles, Petru;  Jiang, Jianhui 收藏  |  浏览/下载：51/0  |  提交时间：2020/12/10 Circuit faults  Built-in self-test  Out of order  Model checking  Integrated circuit modeling  Bounded model checking (BMC)  online testing  out-of-order superscalar processors  software-based self-testing (SBST)