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A QoS-QoR Aware CNN Accelerator Design Approach 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2019, 卷号: 38, 期号: 11, 页码: 1995-2007
作者:  Wang, Ying;  Li, Huawei;  Cheng, Long;  Li, Xiaowei
收藏  |  浏览/下载：47/0  |  提交时间：2020/12/10
Approximate computing  convolutional neural network (CNN)  deep learning (DL)  quality of service (QoS)  real-time  
ShuttleNoC: Power-Adaptable Communication Infrastructure for Many-Core Processors 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2019, 卷号: 38, 期号: 8, 页码: 1438-1451
作者:  Lu, Hang;  Chang, Yisong;  Yan, Guihai;  Lin, Ning;  Wei, Xin;  Li, Xiaowei
收藏  |  浏览/下载：75/0  |  提交时间：2019/12/10
Many-core processors  networks-on-chip (NoCs)  power management  shuttle networks-on-chip (ShuttleNoC)  
Cluster Restoration-Based Trace Signal Selection for Post-Silicon Debug 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2019, 卷号: 38, 期号: 4, 页码: 767-779
作者:  Cheng, Yun;  Li, Huawei;  Wang, Ying;  Li, Xiaowei
收藏  |  浏览/下载：78/0  |  提交时间：2019/08/16
Cluster generation  post-silicon debug  state restoration  trace signal selection  
Deterministic and Probabilistic Diagnostic Challenge Generation for Arbiter Physical Unclonable Function 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 12, 页码: 3186-3197
作者:  Ye, Jing;  Guo, Qingli;  Hu, Yu;  Li, Xiaowei
收藏  |  浏览/下载：263/0  |  提交时间：2019/04/03
Arbiter physical unclonable function (PUF)  delay fault  diagnostic challenge  fault diagnosis  stuck-at fault  
A Case of On-Chip Memory Subsystem Design for Low-Power CNN Accelerators 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 10, 页码: 1971-1984
作者:  Wang, Ying;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：68/0  |  提交时间：2019/12/10
Convolutional neural network (CNN)  deep learning  low power  memory subsystem  
A Low Overhead In-Network Data Compressor for the Memory Hierarchy of Chip Multiprocessors 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 6, 页码: 1265-1277
作者:  Wang, Ying;  Li, Huawei;  Han, Yinhe;  Li, Xiaowei
收藏  |  浏览/下载：67/0  |  提交时间：2019/12/10
Cache  chip multiprocessor (CMP)  compression  memory hierarchy  network-on-chip (NoC)  
Resilience-Aware Frequency Tuning for Neural-Network-Based Approximate Computing Chips 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 10, 页码: 2736-2748
作者:  Wang, Ying;  Deng, Jiachao;  Fang, Yuntan;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：53/0  |  提交时间：2019/12/12
Deep learning  error tolerance  neural network (NN)  timing variation  
Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAs 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 9, 页码: 2525-2537
作者:  Lu, Weina;  Hu, Yu;  Ye, Jing;  Li, Xiaowei
收藏  |  浏览/下载：39/0  |  提交时间：2019/12/12
Computer-aided design flow  field-programmable gate arrays (FPGAs)  hotspot optimization  performance  
Retention-Aware DRAM Assembly and Repair for Future FGR Memories 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2017, 卷号: 36, 期号: 5, 页码: 705-718
作者:  Wang, Ying;  Han, Yin-He;  Wang, Cheng;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：39/0  |  提交时间：2019/12/12
DDR  dynamic random-access memory (DRAM)  memory  refresh  
STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 4, 页码: 1285-1296
作者:  Song, Lili;  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Cheng, Yuanqing;  Li, Xiaowei
收藏  |  浏览/下载：70/0  |  提交时间：2019/12/12
Approximate computing  machine learning  neural network  spin toque transfer RAM (STT-RAM)