CSpace

浏览/检索结果: 共3条,第1-3条 帮助

限定条件        
已选(0)清除 条数/页:   排序方式:
Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAs 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 9, 页码: 2525-2537
作者:  Lu, Weina;  Hu, Yu;  Ye, Jing;  Li, Xiaowei
收藏  |  浏览/下载:39/0  |  提交时间:2019/12/12
Computer-aided design flow  field-programmable gate arrays (FPGAs)  hotspot optimization  performance  
PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 5, 页码: 1613-1625
作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Zhang, Lei;  Cheng, Yuanqing;  Li, Xiaowei
收藏  |  浏览/下载:53/0  |  提交时间:2019/12/13
3-D integration  IR-drop  phase-change memory (PCM)  through-silicon-via (TSV)  write throughput  
Enhanced Wear-Rate Leveling for PRAM Lifetime Improvement Considering Process Variation 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 1, 页码: 92-102
作者:  Han, Yinhe;  Dong, Jianbo;  Weng, Kaiheng;  Wang, Ying;  Li, Xiaowei
收藏  |  浏览/下载:42/0  |  提交时间:2019/12/13
Endurance  phase-change random access memory (PRAM)  wear leveling (WL)