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中国科学院计算技术研究所机构知识库
Institute of Computing Technology, Chinese Academy IR
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中国科学院计算技术... [12]
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Li, Xiaow... [11]
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浏览/检索结果:
共12条,第1-10条
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作者:Li, Huawei分Li, Huawei
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Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses
期刊论文
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2023, 卷号: 28, 期号: 4, 页码: 23
作者:
Chu, Cheng
;
Liu, Cheng
;
Xu, Dawen
;
Wang, Ying
;
Luo, Tao
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:10/0
  |  
提交时间:2023/12/04
Deformable convolution network
neural network accelerator
irregular memory access
runtime tile scheduling
Scalable and Conflict-Free NTT Hardware Accelerator Design: Methodology, Proof, and Implementation
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 5, 页码: 1504-1517
作者:
Mu, Jianan
;
Ren, Yi
;
Wang, Wen
;
Hu, Yizhong
;
Chen, Shuai
;
Chang, Chip-Hong
;
Fan, Junfeng
;
Ye, Jing
;
Cao, Yuan
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:13/0
  |  
提交时间:2023/12/04
Memory access pattern
number theoretic transform (NTT)
post-quantum cryptography (PQC)
scalable hardware design
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 10, 页码: 3400-3413
作者:
Liu, Cheng
;
Chu, Cheng
;
Xu, Dawen
;
Wang, Ying
;
Wang, Qianlong
;
Li, Huawei
;
Li, Xiaowei
;
Cheng, Kwang-Ting
收藏
  |  
浏览/下载:28/0
  |  
提交时间:2022/12/07
Circuit faults
Computational modeling
Deep learning
Hardware
Redundancy
Neural networks
Computer architecture
Deep learning accelerator (DLA)
fault detection
fault tolerance
hybrid computing architecture (HyCA)
An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 9, 页码: 2808-2820
作者:
Wang, Yongchen
;
Wang, Ying
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:33/0
  |  
提交时间:2022/12/07
Streaming media
Neural networks
Image coding
Decoding
Metadata
Deep learning
Hardware
Neural network acceleration
specialized accelerator
video analysis
Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 7, 页码: 2115-2127
作者:
He, Yintao
;
Wang, Ying
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:30/0
  |  
提交时间:2022/12/07
Computer architecture
Microprocessors
Resistance
Power demand
Training
Biological neural networks
Optimization
Low power (LP)
neural networks
processing-in-memory
resistive random-access memory (RRAM)
A Fast Precision Tuning Solution for Always-On DNN Accelerators
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 5, 页码: 1236-1248
作者:
Wang, Ying
;
He, Yintao
;
Cheng, Long
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:28/0
  |  
提交时间:2022/12/07
Computer architecture
Neural networks
Computational modeling
Approximate computing
Tuning
Switches
Microprocessors
Always-on
CNN
computing-in-memory (CiM)
resistive RAM
An Edge 3D CNN Accelerator for Low-Power Activity Recognition
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 5, 页码: 918-930
作者:
Wang, Ying
;
Wang, Yongchen
;
Shi, Cong
;
Cheng, Long
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:40/0
  |  
提交时间:2021/12/01
Three-dimensional displays
Two dimensional displays
Arrays
Feature extraction
System-on-chip
Redundancy
3D CNN
activity analysis
CNN accelerator
network-on-chip
video
Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System
期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2021, 卷号: 29, 期号: 3, 页码: 472-484
作者:
Xu, Dawen
;
Zhu, Ziyang
;
Liu, Cheng
;
Wang, Ying
;
Zhao, Shuang
;
Zhang, Lei
;
Liang, Huaguo
;
Li, Huawei
;
Cheng, Kwang-Ting
收藏
  |  
浏览/下载:40/0
  |  
提交时间:2021/12/01
Neural networks
Circuit faults
Hardware
Acceleration
Reliability
Analytical models
Computational modeling
Integrated circuit reliability
reliability
Architecting Effectual Computation for Machine Learning Accelerators
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 10, 页码: 2654-2667
作者:
Lu, Hang
;
Zhang, Mingzhe
;
Han, Yinhe
;
Wang, Qi
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:91/0
  |  
提交时间:2020/12/10
Computational modeling
Throughput
Adders
Machine learning
Acceleration
Kernel
Computational efficiency
Accelerator architectures
neural network hardware
multiplying circuits
A QoS-QoR Aware CNN Accelerator Design Approach
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2019, 卷号: 38, 期号: 11, 页码: 1995-2007
作者:
Wang, Ying
;
Li, Huawei
;
Cheng, Long
;
Li, Xiaowei
收藏
  |  
浏览/下载:50/0
  |  
提交时间:2020/12/10
Approximate computing
convolutional neural network (CNN)
deep learning (DL)
quality of service (QoS)
real-time