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中国科学院计算技术研究所机构知识库
Institute of Computing Technology, Chinese Academy IR
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中国科学院计算技术... [18]
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浏览/检索结果:
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PIMCOMP: An End-to-End DNN Compiler for Processing-In-Memory Accelerators
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 5, 页码: 1745-1759
作者:
Sun, Xiaotian
;
Wang, Xinyu
;
Li, Wanqian
;
Han, Yinhe
;
Chen, Xiaoming
收藏
  |  
浏览/下载:5/0
  |  
提交时间:2025/06/25
Hardware
Optimization
Artificial neural networks
Pipelines
Parallel processing
Biological system modeling
Resource management
Adaptation models
Scheduling
Memory management
Deep neural network (DNN)
end-to-end compiler
processing-in-memory (PIM) accelerator
system-level optimization
Harmonia
: A Unified Architecture for Efficient Deep Symbolic Regression
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 2, 页码: 737-750
作者:
Ma, Tianyun
;
Wen, Yuanbo
;
Song, Xinkai
;
Jin, Pengwei
;
Huang, Di
;
Han, Husheng
;
Nan, Ziyuan
;
Yu, Zhongkai
;
Peng, Shaohui
;
Zhao, Yongwei
;
Chen, Huaping
;
Du, Zidong
;
Hu, Xing
;
Guo, Qi
收藏
  |  
浏览/下载:7/0
  |  
提交时间:2025/06/25
Skeleton
Optimization
Graphics processing units
Vectors
Hardware
Artificial neural networks
Accuracy
Deep symbolic regression (DSR)
radial basis function network (RBFN)
transcendental functions
unified array
A Task-Adaptive In-Situ ReRAM Computing for Graph Convolutional Networks
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 9, 页码: 2635-2646
作者:
He, Yintao
;
Li, Bing
;
Wang, Ying
;
Liu, Cheng
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:24/0
  |  
提交时间:2024/12/06
Task analysis
Sparse matrices
Convolution
Convolutional neural networks
Design automation
Neural networks
Integrated circuits
Graph convolutional network
hardware acceleration
processing-in-memory
HiHGNN: Accelerating HGNNs Through Parallelism and Data Reusability Exploitation
期刊论文
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2024, 卷号: 35, 期号: 7, 页码: 1122-1138
作者:
Xue, Runzhen
;
Han, Dengke
;
Yan, Mingyu
;
Zou, Mo
;
Yang, Xiaocheng
;
Wang, Duo
;
Li, Wenming
;
Tang, Zhimin
;
Kim, John
;
Ye, Xiaochun
;
Fan, Dongrui
收藏
  |  
浏览/下载:22/0
  |  
提交时间:2024/12/06
Semantics
Parallel processing
Graph neural networks
Vectors
Graphics processing units
Fuses
Hardware
GNN
GNN accelerator
graph neural network
HGNN
HGNN accelerator
heterogeneous graph neural network
General Purpose Deep Learning Accelerator Based on Bit Interleaving
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 5, 页码: 1470-1483
作者:
Chang, Liang
;
Lu, Hang
;
Li, Chenglong
;
Zhao, Xin
;
Hu, Zhicheng
;
Zhou, Jun
;
Li, Xiaowei
收藏
  |  
浏览/下载:27/0
  |  
提交时间:2024/12/06
Synchronization
Parallel processing
Computational modeling
Training
Pragmatics
Power demand
Hardware acceleration
Accelerator
bit-level sparsity
deep neural network (DNN)
MRFI: An Open-Source Multiresolution Fault Injection Framework for Neural Network Processing
期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2024, 页码: 11
作者:
Huang, Haitong
;
Liu, Cheng
;
Xue, Xinghua
;
Liu, Bo
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:32/0
  |  
提交时间:2024/05/20
Biological neural networks
Hardware
Reliability
Computational modeling
Neural networks
Fault tolerant systems
Fault tolerance
Fault evaluation
fault injection
fault simulation
multiresolution
neural network reliability
BitXpro: Regularity-Aware Hardware Runtime Pruning for Deep Neural Networks
期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2023, 卷号: 31, 期号: 1, 页码: 90-103
作者:
Li, Hongyan
;
Lu, Hang
;
Wang, Haoxuan
;
Deng, Shengji
;
Li, Xiaowei
收藏
  |  
浏览/下载:37/0
  |  
提交时间:2023/07/12
Deep learning accelerator
deep neural network (DNN)
hardware runtime pruning
Multi-Node Acceleration for Large-Scale GCNs
期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2022, 卷号: 71, 期号: 12, 页码: 3140-3152
作者:
Sun, Gongjian
;
Yan, Mingyu
;
Wang, Duo
;
Li, Han
;
Li, Wenming
;
Ye, Xiaochun
;
Fan, Dongrui
;
Xie, Yuan
收藏
  |  
浏览/下载:59/0
  |  
提交时间:2023/07/12
Deep learning
graph neural network
hardware accelerator
multi-node system
communication optimization
An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 9, 页码: 2808-2820
作者:
Wang, Yongchen
;
Wang, Ying
;
Li, Huawei
;
Li, Xiaowei
收藏
  |  
浏览/下载:54/0
  |  
提交时间:2022/12/07
Streaming media
Neural networks
Image coding
Decoding
Metadata
Deep learning
Hardware
Neural network acceleration
specialized accelerator
video analysis
TripleBrain: A Compact Neuromorphic Hardware Core With Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity
期刊论文
IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, 2022, 卷号: 16, 期号: 4, 页码: 636-650
作者:
Wang, Haibing
;
He, Zhen
;
Wang, Tengxiao
;
He, Junxian
;
Zhou, Xichuan
;
Wang, Ying
;
Liu, Liyuan
;
Wu, Nanjian
;
Tian, Min
;
Shi, Cong
收藏
  |  
浏览/下载:39/0
  |  
提交时间:2023/07/12
Neurons
Neuromorphics
Hardware
System-on-chip
Field programmable gate arrays
Synapses
Self-organizing feature maps
Neuromorphic system
spiking neural network
spike-timing dependent plasticity
self-organizing map
reinforce- ment learning
on-chip learning