CSpace

浏览/检索结果: 共15条,第1-10条 帮助

已选(0)清除 条数/页:   排序方式:
DFU-E: A Dataflow Architecture for Edge DSP and AI Applications 期刊论文
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2025, 卷号: 36, 期号: 6, 页码: 1100-1114
作者:  Li, Wenming;  Fan, Zhihua;  Liu, Tianyu;  Wang, Zhen;  Wu, Haibin;  Wu, Meng;  Zhang, Kunming;  Liu, Yanhuan;  Sun, Ninghui;  Ye, Xiaochun;  Fan, Dongrui
收藏  |  浏览/下载:6/0  |  提交时间:2025/06/25
Artificial intelligence  Hardware  Edge computing  Computer architecture  Computational modeling  Single instruction multiple data  Energy efficiency  Target recognition  Radar polarimetry  Real-time systems  Dataflow architecture  edge computing  digital signal processing  AI  multi-layer dataflow mechanism  
Trident: The Acceleration Architecture for High-Performance Private Set Intersection 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 4, 页码: 1152-1167
作者:  Zhang, Jinkai;  Yang, Yinghao;  Zhou, Zhe;  Hu, Zhicheng;  Zhao, Xin;  Chang, Liang;  Lu, Hang;  Li, Xiaowei
收藏  |  浏览/下载:5/0  |  提交时间:2025/06/25
Protocols  Receivers  Cryptography  Hardware  Central Processing Unit  Random access memory  Data privacy  Polynomials  Field programmable gate arrays  Computer architecture  Private set intersection (PSI)  fully homomorphic encryption (FHE)  FPGA accelerator  privacy computing  
A Data-Centric Software-Hardware Co-Designed Architecture for Large-Scale Graph Processing 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 4, 页码: 1109-1122
作者:  Li, Zerun;  Chen, Xiaoming;  Yang, Yuxin;  Min, Feng;  Zhang, Xiaoyu;  Han, Yinhe
收藏  |  浏览/下载:6/0  |  提交时间:2025/06/25
Bandwidth  Memory management  Computational modeling  System-on-chip  Software  Hardware  Computer architecture  Three-dimensional displays  Performance evaluation  Data communication  Large-scale graph processing  near memory computing  memory system  accelerator  
Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators 期刊论文
IEEE DESIGN & TEST, 2024, 卷号: 41, 期号: 5, 页码: 46-54
作者:  Liu, Rui;  Li, Zerun;  Zhang, Xiaoyu;  Li, Wanqian;  Shen, Libo;  Tang, Rui;  Luo, Zhejian;  Chen, Xiaoming;  Han, Yinhe;  Tang, Minghua
收藏  |  浏览/下载:13/0  |  提交时间:2024/12/06
Computer architecture  Cryptography  Optimization  Table lookup  Hardware acceleration  Resource management  Space exploration  Computing-in-memory  electronic design automation  cryptographic algorithm  automatic generation  
MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 11, 页码: 4112-4125
作者:  Zhu, Zhenhua;  Sun, Hanbo;  Xie, Tongxin;  Zhu, Yu;  Dai, Guohao;  Xia, Lixue;  Niu, Dimin;  Chen, Xiaoming;  Hu, Xiaobo Sharon;  Cao, Yu;  Xie, Yuan;  Yang, Huazhong;  Wang, Yu
收藏  |  浏览/下载:27/0  |  提交时间:2024/05/20
Computational modeling  Computer architecture  Integrated circuit modeling  Scheduling  Hardware  Memristors  Convolutional neural networks  Hardware modeling tool  processing-in-memory (PIM)  software-hardware co-optimization  
A Framework for Neural Network Architecture and Compile Co-optimization 期刊论文
ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2023, 卷号: 22, 期号: 1, 页码: 24
作者:  Chen, Weiwei;  Wang, Ying;  Xu, Ying;  Gao, Chengsi;  Liu, Cheng;  Zhang, Lei
收藏  |  浏览/下载:33/0  |  提交时间:2023/07/12
DNN-scheduling Co-design  hardware-aware neural architecture search  compiler optimization  
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 10, 页码: 3400-3413
作者:  Liu, Cheng;  Chu, Cheng;  Xu, Dawen;  Wang, Ying;  Wang, Qianlong;  Li, Huawei;  Li, Xiaowei;  Cheng, Kwang-Ting
收藏  |  浏览/下载:52/0  |  提交时间:2022/12/07
Circuit faults  Computational modeling  Deep learning  Hardware  Redundancy  Neural networks  Computer architecture  Deep learning accelerator (DLA)  fault detection  fault tolerance  hybrid computing architecture (HyCA)  
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2021, 卷号: 70, 期号: 9, 页码: 1511-1525
作者:  Liang, Shengwen;  Wang, Ying;  Liu, Cheng;  He, Lei;  Li, Huawei;  Xu, Dawen;  Li, Xiaowei
收藏  |  浏览/下载:61/0  |  提交时间:2021/12/01
Neural networks  Hardware  System-on-chip  Task analysis  Feature extraction  Memory management  Graph neural network  accelerator architecture  hardware acceleration  
Hardware Acceleration for GCNs via Bidirectional Fusion 期刊论文
IEEE COMPUTER ARCHITECTURE LETTERS, 2021, 卷号: 20, 期号: 1, 页码: 4
作者:  Li, Han;  Yan, Mingyu;  Yang, Xiaocheng;  Deng, Lei;  Li, Wenming;  Ye, Xiaochun;  Fan, Dongrui;  Xie, Yuan
收藏  |  浏览/下载:60/0  |  提交时间:2021/12/01
Random access memory  Computational modeling  Analytical models  Hardware  Engines  Computer architecture  Transforms  Graph convolutional neural networks  hardware accelerator  bidirectional execution  inter-phase fusion  
FCDM: A Methodology Based on Sensor Pattern Noise Fingerprinting for Fast Confidence Detection to Adversarial Attacks 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4791-4804
作者:  Lan, Yazhu;  Nixon, Kent W.;  Guo, Qingli;  Zhang, Guohe;  Xu, Yuanchao;  Li, Hai;  Chen, Yiran
收藏  |  浏览/下载:66/0  |  提交时间:2021/12/01
Perturbation methods  Computational modeling  Data integrity  Detectors  Optimization  Field programmable gate arrays  Hardware  Adversarial attacks  confidence detection  deep neural networks (DNNs)  FPGA-based hardware architecture  sensor pattern noise (SPN)