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Improving Utilization of Dataflow Unit for Multi-Batch Processing 期刊论文
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2024, 卷号: 21, 期号: 1, 页码: 26
作者:  Fan, Zhihua;  Li, Wenming;  Wang, Zhen;  Yang, Yu;  Ye, Xiaochun;  Fan, Dongrui;  Sun, Ninghui;  An, Xuejun
收藏  |  浏览/下载：12/0  |  提交时间：2024/05/20
Utilization  network-on-chip  decoupled architecture  batch processing  
A New Reconfigurable True Random Number Generator and Physical Unclonable Function Unified Chip With On-Chip Auto-Calibration 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2023, 页码: 14
作者:  Cao, Yuan;  Liu, Wanyi;  Zheng, Yue;  Chen, Shuai;  Ye, Jing;  Qian, Lei;  Chang, Chip-Hong
收藏  |  浏览/下载：17/0  |  提交时间：2023/12/04
Entropy  Authentication  System-on-chip  Protocols  Jitter  Computer architecture  Rail to rail outputs  True random number generator  physical unclonable function  current-starved ring oscillator  
CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2022, 卷号: 71, 期号: 7, 页码: 1626-1639
作者:  Zou, Kaiwei;  Wang, Ying;  Cheng, Long;  Qu, Songyun;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：38/0  |  提交时间：2022/12/07
Kernel  Computer architecture  Multicore processing  Deep learning  System-on-chip  Parallel processing  Real-time systems  Neural networks  parallel processing  real-time and embedded systems  single-chip multiprocessors  reinforcement learning  structured sparsity  
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2021, 卷号: 70, 期号: 9, 页码: 1511-1525
作者:  Liang, Shengwen;  Wang, Ying;  Liu, Cheng;  He, Lei;  Li, Huawei;  Xu, Dawen;  Li, Xiaowei
收藏  |  浏览/下载：47/0  |  提交时间：2021/12/01
Neural networks  Hardware  System-on-chip  Task analysis  Feature extraction  Memory management  Graph neural network  accelerator architecture  hardware acceleration  
A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 4, 页码: 803-815
作者:  Wu, Bi;  Dai, Pengcheng;  Cheng, Yuanqing;  Wang, Ying;  Yang, Jianlei;  Wang, Zhaohao;  Liu, Dijun;  Zhao, Weisheng
收藏  |  浏览/下载：61/0  |  提交时间：2020/12/10
System-on-chip  Computer architecture  Magnetic tunneling  Transistors  Switches  Thermal sensors  Organizations  Cache  data migration  low power  spin transfer torque magnetic memory (STT-MRAM)  thermal gradient  
Service-Oriented Architecture on FPGA-Based MPSoC 期刊论文
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2017, 卷号: 28, 期号: 10, 页码: 2993-3006
作者:  Wang, Chao;  Li, Xi;  Chen, Yunji;  Zhang, Youhui;  Diessel, Oliver;  Zhou, Xuehai
收藏  |  浏览/下载：73/0  |  提交时间：2019/12/12
Service-oriented architecture  multiprocessor  system on chip  
Stealth-ACK: stealth transmissions of NoC acknowledgements 期刊论文
SCIENCE CHINA-INFORMATION SCIENCES, 2017, 卷号: 60, 期号: 9, 页码: 15
作者:  Tao, Jinhua;  Qiu, Shi;  Liu, Shaoli;  Chen, Tianshi;  Mao, Rui
收藏  |  浏览/下载：63/0  |  提交时间：2019/12/12
networks-on-chip  acknowledgement packet  router architecture  optimisation  routing algorithm  
An Efficient Network-on-Chip Router for Dataflow Architecture 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2017, 卷号: 32, 期号: 1, 页码: 11-25
作者:  Shen, Xiao-Wei;  Ye, Xiao-Chun;  Tan, Xu;  Wang, Da;  Zhang, Lunkai;  Li, Wen-Ming;  Zhang, Zhi-Min;  Fan, Dong-Rui;  Sun, Ning-Hui
收藏  |  浏览/下载：63/0  |  提交时间：2019/12/12
multi-destination  router  network-on-chip  dataflow architecture  high-performance computing  
Data Remapping for Static NUCA in Degradable Chip Multiprocessors 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2015, 卷号: 23, 期号: 5, 页码: 879-892
作者:  Wang, Ying;  Zhang, Lei;  Han, Yin-He;  Li, Hua-Wei;  Li, Xiaowei
收藏  |  浏览/下载：43/0  |  提交时间：2019/12/13
Chip multiprocessor (CMP)  fault tolerant  network-on-chip (NoC)  nonuniform cache architecture (NUCA)  
Auxiliary stream for optimizing memory access of video decoders 期刊论文
SCIENCE CHINA-INFORMATION SCIENCES, 2014, 卷号: 57, 期号: 1
作者:  Liu Shaoli;  Li Ling;  Chen Yunji;  Hu Weiwu
收藏  |  浏览/下载：10/0  |  提交时间：2023/12/04
MOTION COMPENSATION  HIGH-PERFORMANCE  HDTV DECODER  ARCHITECTURE  STANDARDS  CHIP  video decoding  video coding  memory access  motion compensation  auxiliary information