中文版 | English

在结果中检索

CSpace

浏览/检索结果: 共10条，第1-10条 帮助

已选(0)清除 条数/页：   排序方式：
GRACE: An End-to-End Graph Processing Accelerator on FPGA With Graph Reordering Engine 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 10, 页码: 3816-3829
作者:  Fan, Haishuang;  Meng, Rui;  Sun, Qichu;  Wu, Jingya;  Lu, Wenyan;  Li, Xiaowei;  Yan, Guihai
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
Field programmable gate arrays  Redundancy  Indexes  Graphics processing units  Central Processing Unit  Integrated circuit modeling  Computational modeling  Engines  Design automation  Data models  Accelerator  FPGA  Graph processing  
Co-ViSu: Accelerating Video Super-Resolution With Codec Information Reuse 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3451-3464
作者:  Fan, Haishuang;  Sun, Qichu;  Wu, Jingya;  Lu, Wenyan;  Li, Xiaowei;  Yan, Guihai
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
Binary sequences  Streaming media  Decoding  Artificial neural networks  Superresolution  Kernel  Engines  Design automation  Video codecs  Throughput  Accelerator  codec  FPGA  super-resolution (SR)  
SiHGNN: Leveraging Properties of Semantic Graphs for Efficient HGNN Acceleration 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3490-3503
作者:  Xue, Runzhen;  Yan, Mingyu;  Han, Dengke;  Xiao, Ziheng;  Tang, Zhimin;  Ye, Xiaochun;  Fan, Dongrui
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
Semantics  Layout  Graph neural networks  Optimization  Vectors  Graphics processing units  Feature extraction  Design automation  Training  Hardware acceleration  Graph neural network (GNN)  hardware accelerator  heterogeneous graph neural network (HGNN)  semantic graph  
Guest Editorial 2.5D/3D Chiplet Circuits and Systems, EDA, Advanced Packaging, and Test-Part I 期刊论文
IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, 2025, 卷号: 15, 期号: 3, 页码: 362-367
作者:  Hao, Qinfen;  Chen, Kuan-Neng;  Goel, Sandeep Kumar;  Li, Hai;  Marinissen, Erik Jan
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
Special issues and sections  Chiplets  Circuits and systems  Electronic design automation and methodology  Packaging  
Oxpecker: Leaking Secrets via Fetch Target Queue 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 7, 页码: 2461-2474
作者:  Li, Shan;  Xu, Zheliang;  Shen, Haihua;  Li, Huawei
收藏  |  浏览/下载：4/0  |  提交时间：2025/12/03
Program processors  Prefetching  Security  Pipelines  Integrated circuits  Design automation  Prevention and mitigation  Manuals  Decoding  Optimization  Branch prediction unit (BPU)  fetch target queue (FTQ)  front-end  hardware security  instruction fetch unit  instruction prefetcher  
CKTSO: High-Performance Parallel Sparse Linear Solver for General Circuit Simulations 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 5, 页码: 1887-1900
作者:  Chen, Xiaoming
收藏  |  浏览/下载：18/0  |  提交时间：2025/06/25
SPICE  Sparse matrices  Parallel processing  Design automation  Vectors  Scalability  Linear systems  Upper bound  Performance evaluation  Numerical stability  Circuit simulation  parallel linear solver  sparse linear solver  
Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators 期刊论文
IEEE DESIGN & TEST, 2024, 卷号: 41, 期号: 5, 页码: 46-54
作者:  Liu, Rui;  Li, Zerun;  Zhang, Xiaoyu;  Li, Wanqian;  Shen, Libo;  Tang, Rui;  Luo, Zhejian;  Chen, Xiaoming;  Han, Yinhe;  Tang, Minghua
收藏  |  浏览/下载：33/0  |  提交时间：2024/12/06
Computer architecture  Cryptography  Optimization  Table lookup  Hardware acceleration  Resource management  Space exploration  Computing-in-memory  electronic design automation  cryptographic algorithm  automatic generation  
A Task-Adaptive In-Situ ReRAM Computing for Graph Convolutional Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 9, 页码: 2635-2646
作者:  He, Yintao;  Li, Bing;  Wang, Ying;  Liu, Cheng;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：67/0  |  提交时间：2024/12/06
Task analysis  Sparse matrices  Convolution  Convolutional neural networks  Design automation  Neural networks  Integrated circuits  Graph convolutional network  hardware acceleration  processing-in-memory  
Chip design with machine learning: a survey from algorithm perspective 期刊论文
SCIENCE CHINA-INFORMATION SCIENCES, 2023, 卷号: 66, 期号: 11, 页码: 31
作者:  He, Wenkai;  Li, Xiaqing;  Song, Xinkai;  Hao, Yifan;  Zhang, Rui;  Du, Zidong;  Chen, Yunji
收藏  |  浏览/下载：48/0  |  提交时间：2023/12/04
chip design  machine learning  chip design automation  design result estimation  design optimization and correction  design construction  
An Automatic Placement Algorithm for Superconducting Rapid Single-Flux-Quantum Logic Circuits 期刊论文
IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, 2021, 卷号: 31, 期号: 5, 页码: 5
作者:  Fu, Rong-Liang;  Tang, Guang-Ming;  Huang, Junying;  Zhang, Zhi-Min
收藏  |  浏览/下载：84/0  |  提交时间：2022/06/21
Superconducting circuits  RSFQ  design automation  placement