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中国科学院计算技术研究所机构知识库
Institute of Computing Technology, Chinese Academy IR
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浏览/检索结果:
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Joint Beamforming and Transmission Design for Hybrid Backscatter-HTT Communication System
期刊论文
IEEE INTERNET OF THINGS JOURNAL, 2025, 卷号: 12, 期号: 21, 页码: 45437-45452
作者:
Du, Chenyang
;
Guo, Jing
;
Wang, Xinyi
;
Yu, Hanxiao
;
Fei, Zesong
;
Zhou, Xiangyun
;
Durrani, Salman
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Backscatter communication
energy harvesting
harvest-then-transmit (HTT)
harvest-then-transmit (HTT)
multiple antennas
multiple antennas
transmission design
transmission design
transmission design
OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine-Learning Tasks in Logic Synthesis
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 10, 页码: 3830-3843
作者:
Ni, Liwei
;
Wang, Rui
;
Liu, Miao
;
Meng, Xingyu
;
Lin, Xiaoze
;
Liu, Junfeng
;
Luo, Guojie
;
Chu, Zhufei
;
Qian, Weikang
;
Yang, Xiaoyan
;
Xie, Biwei
;
Li, Xingquan
;
Li, Huawei
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Logic
Logic gates
Delays
Optimization
Machine learning
Hardware design languages
Boolean functions
Computer science
Benchmark testing
Wire
Adaptive
application
dataset
logic synthesis
machine learning (ML)
GRACE: An End-to-End Graph Processing Accelerator on FPGA With Graph Reordering Engine
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 10, 页码: 3816-3829
作者:
Fan, Haishuang
;
Meng, Rui
;
Sun, Qichu
;
Wu, Jingya
;
Lu, Wenyan
;
Li, Xiaowei
;
Yan, Guihai
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Field programmable gate arrays
Redundancy
Indexes
Graphics processing units
Central Processing Unit
Integrated circuit modeling
Computational modeling
Engines
Design automation
Data models
Accelerator
FPGA
Graph processing
Co-ViSu: Accelerating Video Super-Resolution With Codec Information Reuse
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3451-3464
作者:
Fan, Haishuang
;
Sun, Qichu
;
Wu, Jingya
;
Lu, Wenyan
;
Li, Xiaowei
;
Yan, Guihai
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Binary sequences
Streaming media
Decoding
Artificial neural networks
Superresolution
Kernel
Engines
Design automation
Video codecs
Throughput
Accelerator
codec
FPGA
super-resolution (SR)
SiHGNN: Leveraging Properties of Semantic Graphs for Efficient HGNN Acceleration
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3490-3503
作者:
Xue, Runzhen
;
Yan, Mingyu
;
Han, Dengke
;
Xiao, Ziheng
;
Tang, Zhimin
;
Ye, Xiaochun
;
Fan, Dongrui
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Semantics
Layout
Graph neural networks
Optimization
Vectors
Graphics processing units
Feature extraction
Design automation
Training
Hardware acceleration
Graph neural network (GNN)
hardware accelerator
heterogeneous graph neural network (HGNN)
semantic graph
Re-Meltrix: A Reconfigurable Processing-in-Memory Architecture Based on RRAM and Function Synthesis
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3409-3422
作者:
Long, Boyu
;
Han, Yinhe
;
Sun, Xian-He
;
Chen, Xiaoming
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Logic
Computer architecture
Integrated circuit interconnections
Hardware
Routing
Circuits
Table lookup
Decoding
Performance evaluation
Logic gates
Processing in memory
resistive random-access memory (RRAM)
software-hardware co-design
ternary content-addressable memory (TCAM)
DNA: A General
D
ynamic Neural
N
etwork
A
ccelerator
期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 9, 页码: 3210-3222
作者:
Liu, Lian
;
Yu, Jinxin
;
Wang, Mengdi
;
Li, Xiaowei
;
Han, Yinhe
;
Wang, Ying
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Dynamic scheduling
Artificial neural networks
DNA
Processor scheduling
Loading
Prefetching
Runtime
Costs
Switches
Optimization
Dynamic NN
NPU design
accelerator
Guest Editorial 2.5D/3D Chiplet Circuits and Systems, EDA, Advanced Packaging, and Test-Part I
期刊论文
IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, 2025, 卷号: 15, 期号: 3, 页码: 362-367
作者:
Hao, Qinfen
;
Chen, Kuan-Neng
;
Goel, Sandeep Kumar
;
Li, Hai
;
Marinissen, Erik Jan
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Special issues and sections
Chiplets
Circuits and systems
Electronic design automation and methodology
Packaging
Joint Beamforming and Offloading Design for Integrated Sensing, Communication, and Computation System
期刊论文
IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, 2025, 卷号: 74, 期号: 9, 页码: 14933-14937
作者:
Liu, Peng
;
Fei, Zesong
;
Wang, Xinyi
;
Zhou, Yiqing
;
Zhang, Yan
;
Liu, Fan
收藏
  |  
浏览/下载:3/0
  |  
提交时间:2025/12/03
Integrated sensing and communication
Integrated sensing and communication
mobile edge computing
mobile edge computing
computation offloading
computation offloading
beamforming design
beamforming design
Oxpecker: Leaking Secrets via Fetch Target Queue
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 7, 页码: 2461-2474
作者:
Li, Shan
;
Xu, Zheliang
;
Shen, Haihua
;
Li, Huawei
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2025/12/03
Program processors
Prefetching
Security
Pipelines
Integrated circuits
Design automation
Prevention and mitigation
Manuals
Decoding
Optimization
Branch prediction unit (BPU)
fetch target queue (FTQ)
front-end
hardware security
instruction fetch unit
instruction prefetcher