中国科学院计算技术研究所机构知识库

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	MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 11, 页码: 4112-4125 作者:  Zhu, Zhenhua;  Sun, Hanbo;  Xie, Tongxin;  Zhu, Yu;  Dai, Guohao;  Xia, Lixue;  Niu, Dimin;  Chen, Xiaoming;  Hu, Xiaobo Sharon;  Cao, Yu;  Xie, Yuan;  Yang, Huazhong;  Wang, Yu 收藏  |  浏览/下载：9/0  |  提交时间：2024/05/20 Computational modeling  Computer architecture  Integrated circuit modeling  Scheduling  Hardware  Memristors  Convolutional neural networks  Hardware modeling tool  processing-in-memory (PIM)  software-hardware co-optimization
	A Framework for Neural Network Architecture and Compile Co-optimization 期刊论文 ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2023, 卷号: 22, 期号: 1, 页码: 24 作者:  Chen, Weiwei;  Wang, Ying;  Xu, Ying;  Gao, Chengsi;  Liu, Cheng;  Zhang, Lei 收藏  |  浏览/下载：21/0  |  提交时间：2023/07/12 DNN-scheduling Co-design  hardware-aware neural architecture search  compiler optimization
	Practical Iterative Optimization for the Data Center 期刊论文 ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2015, 卷号: 12, 期号: 2, 页码: 26 作者:  Fang, Shuangde;  Xu, Wenwen;  Chen, Yang;  Eeckhout, Lieven;  Temam, Olivier;  Chen, Yunji;  Wu, Chengyong;  Feng, Xiaobing 收藏  |  浏览/下载：55/0  |  提交时间：2019/12/13 Design  Performance  Iterative optimization  compiler  MapReduce  server  data center  co-run
	Co-optimization of Dynamic/Static Test Power in Scan Test 期刊论文 CHINESE JOURNAL OF ELECTRONICS, 2009, 卷号: 18, 期号: 1, 页码: 54-58 作者:  Wang Wei;  Han Yinhe;  Li Xiaowei;  Fang Fang 收藏  |  浏览/下载：45/0  |  提交时间：2019/12/16 Co-optimization  Test power  Blocking logic  Minimum leakage vector