中国科学院计算技术研究所机构知识库

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	RIVL: A Low-Cost SoC Agile Development Platform for Multiple RISC-V Processors Design and Verification 期刊论文 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024, 页码: 11 作者:  Xu, Lida;  Cao, Zewen;  Zhao, Hualong;  Peng, Zhuo;  Miao, Yuchi;  Zhuang, Chunan;  Ruan, Hongrui;  Dong, Yuying;  Zeng, Chuanbin;  Li, Bo;  Luo, Jiajun 收藏  |  浏览/下载：5/0  |  提交时间：2025/06/25 Program processors  Hardware  Chip scale packaging  Design methodology  Costs  Object oriented modeling  Complexity theory  Testing  Registers  Prototypes  Agile methodology  object-oriented hardware  RISC-V  low-cost  integration  verification  open source
	Toward Developing High-Performance RISC-V Processors Using Agile Methodology 期刊论文 IEEE MICRO, 2023, 卷号: 43, 期号: 4, 页码: 98-106 作者:  Xu, Yinan;  Yu, Zihao;  Tang, Dan;  Cai, Ye;  Huan, Dandan;  He, Wei;  Sun, Ninghui;  Bao, Yungang 收藏  |  浏览/下载：27/0  |  提交时间：2023/12/04 Program processors  Behavioral sciences  Chip scale packaging  Microarchitecture  Hardware  Analytical models  Layout
	A Chip-Level Optical Interconnect for CPU 期刊论文 IEEE PHOTONICS TECHNOLOGY LETTERS, 2021, 卷号: 33, 期号: 16, 页码: 852-855 作者:  Hao, Qinfen;  Qin, Mengyuan;  Qi, Nan;  Xue, Haiyun;  Han, Meng;  Li, Xiaolin;  Hao, Kai;  Niu, Xingmao;  Xiao, Limin;  Fan, Dongrui;  Kurata, Kazuhiko 收藏  |  浏览/下载：66/0  |  提交时间：2021/12/01 Integrated optics  Optical interconnections  Transceivers  Adaptive optics  Optical switches  Optical sensors  Power demand  Optical interconnections  digital integrated circuits  very high speed integrated circuits  chip scale packaging  system integration