中国科学院计算技术研究所机构知识库

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	DFU-E: A Dataflow Architecture for Edge DSP and AI Applications 期刊论文 IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2025, 卷号: 36, 期号: 6, 页码: 1100-1114 作者:  Li, Wenming;  Fan, Zhihua;  Liu, Tianyu;  Wang, Zhen;  Wu, Haibin;  Wu, Meng;  Zhang, Kunming;  Liu, Yanhuan;  Sun, Ninghui;  Ye, Xiaochun;  Fan, Dongrui 收藏  |  浏览/下载：5/0  |  提交时间：2025/06/25 Artificial intelligence  Hardware  Edge computing  Computer architecture  Computational modeling  Single instruction multiple data  Energy efficiency  Target recognition  Radar polarimetry  Real-time systems  Dataflow architecture  edge computing  digital signal processing  AI  multi-layer dataflow mechanism
	Searching to extrapolate embedding for out-of-graph node representation learning 期刊论文 NEURAL NETWORKS, 2025, 卷号: 184, 页码: 15 作者:  Shen, Zhenqian;  Guo, Shuhan;  Wen, Yan;  Wei, Lanning;  Zhang, Wengang;  Luo, Yuanhai;  Wu, Chongwu;  Yao, Quanming 收藏  |  浏览/下载：3/0  |  提交时间：2025/06/25 Graph neural network  Neural architecture search  Graph embedding  Out-of-sample learning
	Trident: The Acceleration Architecture for High-Performance Private Set Intersection 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 4, 页码: 1152-1167 作者:  Zhang, Jinkai;  Yang, Yinghao;  Zhou, Zhe;  Hu, Zhicheng;  Zhao, Xin;  Chang, Liang;  Lu, Hang;  Li, Xiaowei 收藏  |  浏览/下载：4/0  |  提交时间：2025/06/25 Protocols  Receivers  Cryptography  Hardware  Central Processing Unit  Random access memory  Data privacy  Polynomials  Field programmable gate arrays  Computer architecture  Private set intersection (PSI)  fully homomorphic encryption (FHE)  FPGA accelerator  privacy computing
	A Data-Centric Software-Hardware Co-Designed Architecture for Large-Scale Graph Processing 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2025, 卷号: 74, 期号: 4, 页码: 1109-1122 作者:  Li, Zerun;  Chen, Xiaoming;  Yang, Yuxin;  Min, Feng;  Zhang, Xiaoyu;  Han, Yinhe 收藏  |  浏览/下载：6/0  |  提交时间：2025/06/25 Bandwidth  Memory management  Computational modeling  System-on-chip  Software  Hardware  Computer architecture  Three-dimensional displays  Performance evaluation  Data communication  Large-scale graph processing  near memory computing  memory system  accelerator
	FuHsi: Shifting Base-Calling Closer to Sequencer via In-Cache Acceleration 期刊论文 JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2025, 卷号: 40, 期号: 2, 页码: 482-499 作者:  Li, Ye-Wen;  Tan, Guang-Ming;  Li, Xue-Qi 收藏  |  浏览/下载：3/0  |  提交时间：2025/06/25 genome base-calling  in-cache accelerator  domain-specific architecture  genome analysis  Nanopore sequencing
	FastDet: Providing faster deterministic transmission for time-sensitive flows in WAN 期刊论文 COMPUTER NETWORKS, 2025, 卷号: 256, 页码: 15 作者:  Wang, Mengyu;  Zhu, Shuyong;  Zhang, Yujun 收藏  |  浏览/下载：1/0  |  提交时间：2025/06/25 Queuing and forwarding mechanism  Bounded latency and jitter  Lower queuing delay  Deterministic networking architecture
	Pyramid: Accelerating LLM Inference With Cross-Level Processing-in-Memory 期刊论文 IEEE COMPUTER ARCHITECTURE LETTERS, 2025, 卷号: 24, 期号: 1, 页码: 121-124 作者:  Yan, Liang;  Lu, Xiaoyang;  Chen, Xiaoming;  Han, Yinhe;  Sun, Xian-He 收藏  |  浏览/下载：3/0  |  提交时间：2025/06/25 Graphics processing units  Decoding  Computational modeling  Parallel processing  Systolic arrays  Computer architecture  Table lookup  Random access memory  Interpolation  Transformers  Large language models  Processing-in-memory
	Heterogeneous Gene Sequence Alignment System Based on 12-GHz Superconducting Chip 期刊论文 IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, 2024, 卷号: 34, 期号: 9, 页码: 7 作者:  Yuan, Chenbo;  Qu, Peiyao;  Li, Lingyun;  Liu, Huanli;  Liang, Tianhang;  Jiang, ZheLong;  Chen, Gang;  Tang, Guangming 收藏  |  浏览/下载：18/0  |  提交时间：2024/12/06 Communication architecture  keyword matching  superconducting digital circuits  Communication architecture  keyword matching  superconducting digital circuits
	Satisfying Energy-Efficiency Constraints for Mobile Systems 期刊论文 IEEE TRANSACTIONS ON MOBILE COMPUTING, 2024, 卷号: 23, 期号: 12, 页码: 14280-14296 作者:  Li, Xueliang;  Hong, Shicong;  Chen, Junyang;  Ji, Junkai;  Luo, Chengwen;  Yan, Guihai;  Yu, Zhibin;  Li, Jianqiang 收藏  |  浏览/下载：5/0  |  提交时间：2025/06/25 Central Processing Unit  Power measurement  Software  Message services  Computer architecture  Smart phones  Social networking (online)  Energy efficiency  psychophysics  sustainable computing  user experience
	Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators 期刊论文 IEEE DESIGN & TEST, 2024, 卷号: 41, 期号: 5, 页码: 46-54 作者:  Liu, Rui;  Li, Zerun;  Zhang, Xiaoyu;  Li, Wanqian;  Shen, Libo;  Tang, Rui;  Luo, Zhejian;  Chen, Xiaoming;  Han, Yinhe;  Tang, Minghua 收藏  |  浏览/下载：12/0  |  提交时间：2024/12/06 Computer architecture  Cryptography  Optimization  Table lookup  Hardware acceleration  Resource management  Space exploration  Computing-in-memory  electronic design automation  cryptographic algorithm  automatic generation