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A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition 期刊论文
INTEGRATION-THE VLSI JOURNAL, 2019, 卷号: 66, 页码: 164-172
作者:  Wei, Xing;  Yang, Haigang;  Li, Wei;  Huang, Zhihong;  Yin, Tao;  Yu, Le
收藏  |  浏览/下载:94/0  |  提交时间:2019/08/16
Floating-point  Fast fourier transform (FFT)  Mixed-radix  Multi-path delay feedback (MDF)  Binary-tree decomposition  Twiddle factor  Fused FP arithmetic unit  
On-Chip Generating FPGA Test Configuration Bitstreams to Reduce Manufacturing Test Time 期刊论文
CHINESE JOURNAL OF ELECTRONICS, 2016, 卷号: 25, 期号: 1, 页码: 64-70
作者:  Wang Fei;  Wang Da;  Yang Haigang;  Xie Xianghui;  Fan Dongrui
收藏  |  浏览/下载:57/0  |  提交时间:2019/12/13
FPGA test  Test configuration bitstream  Design-for-testability