中文版 | English

在结果中检索

CSpace

浏览/检索结果: 共11条，第1-10条 帮助

限定条件    
已选(0)清除 条数/页：   排序方式：
Long Live TIME: Improving Lifetime and Security for NVM-Based Training-in-Memory Systems 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4707-4720
作者:  Cai, Yi;  Lin, Yujun;  Xia, Lixue;  Chen, Xiaoming;  Han, Song;  Wang, Yu;  Yang, Huazhong
收藏  |  浏览/下载：35/0  |  提交时间：2021/12/01
Gradient sparsification  lifetime  neural networks  training-in-memory  wear-leveling  
Swallow: A Versatile Accelerator for Sparse Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4881-4893
作者:  Liu, Bosheng;  Chen, Xiaoming;  Han, Yinhe;  Xu, Haobo
收藏  |  浏览/下载：27/0  |  提交时间：2021/12/01
Accelerator  convolutional (Conv) layers  fully connected (FC) layers  sparse neural networks (SNNs)  
FCDM: A Methodology Based on Sensor Pattern Noise Fingerprinting for Fast Confidence Detection to Adversarial Attacks 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4791-4804
作者:  Lan, Yazhu;  Nixon, Kent W.;  Guo, Qingli;  Zhang, Guohe;  Xu, Yuanchao;  Li, Hai;  Chen, Yiran
收藏  |  浏览/下载：38/0  |  提交时间：2021/12/01
Perturbation methods  Computational modeling  Data integrity  Detectors  Optimization  Field programmable gate arrays  Hardware  Adversarial attacks  confidence detection  deep neural networks (DNNs)  FPGA-based hardware architecture  sensor pattern noise (SPN)  
A Guaranteed Secure Scan Design Based on Test Data Obfuscation by Cryptographic Hash 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4524-4536
作者:  Cui, Aijiao;  Li, Mengyang;  Qu, Gang;  Li, Huawei
收藏  |  浏览/下载：28/0  |  提交时间：2021/12/01
Ciphers  Encryption  Integrated circuits  Side-channel attacks  Testing  Cryptographic hash function  obfuscation logic  scan design  scan-based side-channel attack  
Fusion-Catalyzed Pruning for Optimizing Deep Learning on Intelligent Edge Devices 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 11, 页码: 3614-3626
作者:  Li, Guangli;  Ma, Xiu;  Wang, Xueying;  Liu, Lei;  Xue, Jingling;  Feng, Xiaobing
收藏  |  浏览/下载：45/0  |  提交时间：2021/12/01
Deep learning system  edge intelligence  model compression and acceleration  neural networks  
Structured Decomposition for Reversible Boolean Functions 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 10, 页码: 2410-2421
作者:  Jiang, Jiaqing;  Sun, Xiaoming;  Sun, Yuan;  Wu, Kewen;  Xia, Zhiyu
收藏  |  浏览/下载：40/0  |  提交时间：2020/12/10
Integrated circuits  logic gates  quantum computation  reversible computation  reversible logic  synthesis method  
Architecting Effectual Computation for Machine Learning Accelerators 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 10, 页码: 2654-2667
作者:  Lu, Hang;  Zhang, Mingzhe;  Han, Yinhe;  Wang, Qi;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：86/0  |  提交时间：2020/12/10
Computational modeling  Throughput  Adders  Machine learning  Acceleration  Kernel  Computational efficiency  Accelerator architectures  neural network hardware  multiplying circuits  
ParaML: A Polyvalent Multicore Accelerator for Machine Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 9, 页码: 1764-1777
作者:  Zhou, Shengyuan;  Guo, Qi;  Du, Zidong;  Liu, Daofu;  Chen, Tianshi;  Li, Ling;  Liu, Shaoli;  Zhou, Jinhong;  Temam, Olivier;  Feng, Xiaobing;  Zhou, Xuehai;  Chen, Yunji
收藏  |  浏览/下载：48/0  |  提交时间：2020/12/10
Neural networks  Machine learning  Testing  Support vector machines  Linear regression  Computers  Computer architecture  Accelerator  machine learning (ML) techniques  multicore accelerator  
A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 4, 页码: 803-815
作者:  Wu, Bi;  Dai, Pengcheng;  Cheng, Yuanqing;  Wang, Ying;  Yang, Jianlei;  Wang, Zhaohao;  Liu, Dijun;  Zhao, Weisheng
收藏  |  浏览/下载：50/0  |  提交时间：2020/12/10
System-on-chip  Computer architecture  Magnetic tunneling  Transistors  Switches  Thermal sensors  Organizations  Cache  data migration  low power  spin transfer torque magnetic memory (STT-MRAM)  thermal gradient  
Software-Based Self-Testing Using Bounded Model Checking for Out-of-Order Superscalar Processors 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 3, 页码: 714-727
作者:  Zhang, Ying;  Chakrabarty, Krishnendu;  Peng, Zebo;  Rezine, Ahmed;  Li, Huawei;  Eles, Petru;  Jiang, Jianhui
收藏  |  浏览/下载：49/0  |  提交时间：2020/12/10
Circuit faults  Built-in self-test  Out of order  Model checking  Integrated circuit modeling  Bounded model checking (BMC)  online testing  out-of-order superscalar processors  software-based self-testing (SBST)