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On-Line Fault Protection for ReRAM-Based Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2023, 卷号: 72, 期号: 2, 页码: 423-437
作者:  Li, Wen;  Wang, Ying;  Liu, Cheng;  He, Yintao;  Liu, Lian;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：14/0  |  提交时间：2023/07/12
Training  Fault detection  Computational modeling  Image edge detection  Memristors  Neural networks  Kernel  Deep neural network  hard fault  ReRAM  reliability  soft fault  
SynergyFlow: An Elastic Accelerator Architecture Supporting Batch Processing of Large-Scale Deep Neural Networks 期刊论文
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2019, 卷号: 24, 期号: 1, 页码: 27
作者:  Li, Jiajun;  Yan, Guihai;  Lu, Wenyan;  Gong, Shijun;  Jiang, Shuhao;  Wu, Jingya;  Li, Xiaowei
收藏  |  浏览/下载：70/0  |  提交时间：2019/04/03
Deep neural networks  convolutional neural networks  accelerator  architecture  resource utilization  complementary effect  
Fault tolerance on-chip: a reliable computing paradigm using self-test, self-diagnosis, and self-repair (3S) approach 期刊论文
SCIENCE CHINA-INFORMATION SCIENCES, 2018, 卷号: 61, 期号: 11, 页码: 17
作者:  Li, Xiaowei;  Yan, Guihai;  Ye, Jing;  Wang, Ying
收藏  |  浏览/下载：69/0  |  提交时间：2019/12/10
fault tolerance  on-chip  self-test  self-diagnosis  self-repair  
Power-Utility-Driven Write Management for MLC PCM 期刊论文
ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 2017, 卷号: 13, 期号: 3, 页码: 22
作者:  Li, Bing;  Hu, Yu;  Wang, Ying;  Ye, Jing;  Li, Xiaowei
收藏  |  浏览/下载：54/0  |  提交时间：2019/12/12
Phase change memory  multi-level  main memory  power  write management  optimization  
CoreRank: Redeeming "Sick Silicon" by Dynamically Quantifying Core-Level Healthy Condition 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2016, 卷号: 65, 期号: 3, 页码: 716-729
作者:  Yan, Guihai;  Sun, Faqiang;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：39/0  |  提交时间：2019/12/13
Reliability  heterogeneity  healthy condition  manycore processor  
Enhanced Wear-Rate Leveling for PRAM Lifetime Improvement Considering Process Variation 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 1, 页码: 92-102
作者:  Han, Yinhe;  Dong, Jianbo;  Weng, Kaiheng;  Wang, Ying;  Li, Xiaowei
收藏  |  浏览/下载：42/0  |  提交时间：2019/12/13
Endurance  phase-change random access memory (PRAM)  wear leveling (WL)  
Data Remapping for Static NUCA in Degradable Chip Multiprocessors 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2015, 卷号: 23, 期号: 5, 页码: 879-892
作者:  Wang, Ying;  Zhang, Lei;  Han, Yin-He;  Li, Hua-Wei;  Li, Xiaowei
收藏  |  浏览/下载：37/0  |  提交时间：2019/12/13
Chip multiprocessor (CMP)  fault tolerant  network-on-chip (NoC)  nonuniform cache architecture (NUCA)  
A signal degradation reduction method for memristor ratioed logic (MRL) gates 期刊论文
IEICE ELECTRONICS EXPRESS, 2015, 卷号: 12, 期号: 8, 页码: 6
作者:  Liu, Bosheng l;  Wang, Ying;  You, Zhiqiang;  Han, Yinhe;  Li, Xiaowei
收藏  |  浏览/下载：39/0  |  提交时间：2019/12/13
full adder  memristor ratioed logic (MRL) gate  
ReviveNet: A Self-Adaptive Architecture for Improving Lifetime Reliability via Localized Timing Adaptation 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2011, 卷号: 60, 期号: 9, 页码: 1219-1232
作者:  Yan, Guihai;  Han, Yinhe;  Li, Xiaowei
收藏  |  浏览/下载：64/0  |  提交时间：2019/12/16
Lifetime reliability  self-adaptive  aging sensor  timing adaptation  NBTI  
Statistical lifetime reliability optimization considering joint effect of process variation and aging 期刊论文
INTEGRATION-THE VLSI JOURNAL, 2011, 卷号: 44, 期号: 3, 页码: 185-191
作者:  Jin, Song;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：67/0  |  提交时间：2019/12/16
Lifetime reliability  Process variation  NBTI  Duty cycle  Gate sizing