CSpace

浏览/检索结果: 共10条,第1-10条 帮助

限定条件                        
已选(0)清除 条数/页:   排序方式:
Soft Error Reliability Analysis of Vision Transformers 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2023, 页码: 11
作者:  Xue, Xinghua;  Liu, Cheng;  Wang, Ying;  Yang, Bing;  Luo, Tao;  Zhang, Lei;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:7/0  |  提交时间:2023/12/04
ABFT  fault-tolerance  soft errors  vision transformers (ViTs)  vulnerability analysis  
On-Line Fault Protection for ReRAM-Based Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2023, 卷号: 72, 期号: 2, 页码: 423-437
作者:  Li, Wen;  Wang, Ying;  Liu, Cheng;  He, Yintao;  Liu, Lian;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:14/0  |  提交时间:2023/07/12
Training  Fault detection  Computational modeling  Image edge detection  Memristors  Neural networks  Kernel  Deep neural network  hard fault  ReRAM  reliability  soft fault  
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 10, 页码: 3400-3413
作者:  Liu, Cheng;  Chu, Cheng;  Xu, Dawen;  Wang, Ying;  Wang, Qianlong;  Li, Huawei;  Li, Xiaowei;  Cheng, Kwang-Ting
收藏  |  浏览/下载:26/0  |  提交时间:2022/12/07
Circuit faults  Computational modeling  Deep learning  Hardware  Redundancy  Neural networks  Computer architecture  Deep learning accelerator (DLA)  fault detection  fault tolerance  hybrid computing architecture (HyCA)  
Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2021, 卷号: 29, 期号: 3, 页码: 472-484
作者:  Xu, Dawen;  Zhu, Ziyang;  Liu, Cheng;  Wang, Ying;  Zhao, Shuang;  Zhang, Lei;  Liang, Huaguo;  Li, Huawei;  Cheng, Kwang-Ting
收藏  |  浏览/下载:38/0  |  提交时间:2021/12/01
Neural networks  Circuit faults  Hardware  Acceleration  Reliability  Analytical models  Computational modeling  Integrated circuit reliability  reliability  
STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 4, 页码: 1285-1296
作者:  Song, Lili;  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Cheng, Yuanqing;  Li, Xiaowei
收藏  |  浏览/下载:70/0  |  提交时间:2019/12/12
Approximate computing  machine learning  neural network  spin toque transfer RAM (STT-RAM)  
CoreRank: Redeeming "Sick Silicon" by Dynamically Quantifying Core-Level Healthy Condition 期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2016, 卷号: 65, 期号: 3, 页码: 716-729
作者:  Yan, Guihai;  Sun, Faqiang;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:39/0  |  提交时间:2019/12/13
Reliability  heterogeneity  healthy condition  manycore processor  
LOFT: A low-overhead fault-tolerant routing scheme for 3D NoCs 期刊论文
INTEGRATION-THE VLSI JOURNAL, 2016, 卷号: 52, 页码: 41-50
作者:  Zhou, Jun;  Li, Huawei;  Wang, Tiancheng;  Li, Xiaowei
收藏  |  浏览/下载:46/0  |  提交时间:2019/12/13
Networks-on-chip  3D Mesh  Permanent fault  Fault-tolerance  Routing scheme  
Statistical lifetime reliability optimization considering joint effect of process variation and aging 期刊论文
INTEGRATION-THE VLSI JOURNAL, 2011, 卷号: 44, 期号: 3, 页码: 185-191
作者:  Jin, Song;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:67/0  |  提交时间:2019/12/16
Lifetime reliability  Process variation  NBTI  Duty cycle  Gate sizing  
A New Multiple-Round Dimension-Order Routing for Networks-on-Chip 期刊论文
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2011, 卷号: E94D, 期号: 4, 页码: 809-821
作者:  Fu, Binzhang;  Han, Yinhe;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:70/0  |  提交时间:2019/12/16
network-on-chip (NoC)  fault-tolerant routing  multiple round dimension-order routing  turn model  
Compression/scan co-design for reducing test data volume, scan-in power dissipation, and test application time 期刊论文
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2006, 卷号: E89D, 期号: 10, 页码: 2616-2625
作者:  Hu, Yu;  Han, Yinhe;  Li, Xiaowei;  Li, Huawei;  Wen, Xiaoqing
收藏  |  浏览/下载:45/0  |  提交时间:2019/12/16
compression  run-length coding  random access scan  power dissipation  test application time