中国科学院计算技术研究所机构知识库

浏览/检索结果: 共5条，第1-5条

帮助

限定条件	作者：Cheng, Yuanqing分Cheng, Yuanqing

已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择WOS被引频次升序WOS被引频次降序提交时间升序提交时间降序期刊影响因子升序期刊影响因子降序题名升序题名降序作者升序作者降序发表日期升序发表日期降序
	PDG: A Prefetcher for Dynamic Graph Updating 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 4, 页码: 1246-1259 作者:  Zhang, Xinmiao;  Liu, Cheng;  Ni, Jiacheng;  Cheng, Yuanqing;  Zhang, Lei;  Li, Huawei;  Li, Xiaowei 收藏  |  浏览/下载：5/0  |  提交时间：2024/05/20 Prefetching  Arrays  Optimization  Runtime  Heuristic algorithms  Computers  Monitoring  Computer architecture  data prefetching  memory system
	A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 4, 页码: 803-815 作者:  Wu, Bi;  Dai, Pengcheng;  Cheng, Yuanqing;  Wang, Ying;  Yang, Jianlei;  Wang, Zhaohao;  Liu, Dijun;  Zhao, Weisheng 收藏  |  浏览/下载：54/0  |  提交时间：2020/12/10 System-on-chip  Computer architecture  Magnetic tunneling  Transistors  Switches  Thermal sensors  Organizations  Cache  data migration  low power  spin transfer torque magnetic memory (STT-MRAM)  thermal gradient
	An Adaptive Thermal-Aware ECC Scheme for Reliable STT-MRAM LLC Design 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2019, 卷号: 27, 期号: 8, 页码: 1851-1860 作者:  Wu, Bi;  Zhang, Beibei;  Cheng, Yuanqing;  Wang, Ying;  Liu, Dijun;  Zhao, Weisheng 收藏  |  浏览/下载：80/0  |  提交时间：2019/12/10 Error correction code (ECC)  last level cache (LLC)  reliability  spin-transfer-torque magnetoresistive random-access memory (STT-MRAM)  temperature
	STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 4, 页码: 1285-1296 作者:  Song, Lili;  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Cheng, Yuanqing;  Li, Xiaowei 收藏  |  浏览/下载：72/0  |  提交时间：2019/12/12 Approximate computing  machine learning  neural network  spin toque transfer RAM (STT-RAM)
	PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 5, 页码: 1613-1625 作者:  Wang, Ying;  Han, Yinhe;  Li, Huawei;  Zhang, Lei;  Cheng, Yuanqing;  Li, Xiaowei 收藏  |  浏览/下载：55/0  |  提交时间：2019/12/13 3-D integration  IR-drop  phase-change memory (PCM)  through-silicon-via (TSV)  write throughput