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ApproxDup: Developing an Approximate Instruction Duplication Mechanism for Efficient SDC Detection in GPGPUs 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 4, 页码: 1051-1064
作者:  Wei, Xiaohui;  Jiang, Nan;  Yue, Hengshan;  Wang, Xiaonan;  Zhao, Jianpeng;  Li, Guangli;  Qiu, Meikang
收藏  |  浏览/下载：3/0  |  提交时间：2024/05/20
Instruction sets  Reliability  Resilience  Circuit faults  Registers  Kernel  Graphics processing units  Approximate computing  GPGPUs  instruction duplication  silent data corruptions (SDCs)  soft error  
Asymptotically Optimal Circuit Depth for Quantum State Preparation and General Unitary Synthesis 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 10, 页码: 3301-3314
作者:  Sun, Xiaoming;  Tian, Guojing;  Yang, Shuai;  Yuan, Pei;  Zhang, Shengyu
收藏  |  浏览/下载：7/0  |  提交时间：2023/12/04
Circuit depth  depth-space tradeoff  quantum circuit  state preparation  unitary synthesis  
FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory Computing 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 9, 页码: 2889-2902
作者:  Liu, Rui;  Zhang, Xiaoyu;  Xie, Zhiwen;  Wang, Xinyu;  Li, Zerun;  Chen, Xiaoming;  Han, Yinhe;  Tang, Minghua
收藏  |  浏览/下载：9/0  |  提交时间：2023/12/04
Computing-in-memory (CiM)  cryptographic algorithm  ferroelectric field-effect transistor (FeFET)  instruc-tion set architecture (ISA)  
Optimizing Training Efficiency and Cost of Hierarchical Federated Learning in Heterogeneous Mobile-Edge Cloud Computing 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2023, 卷号: 42, 期号: 5, 页码: 1518-1531
作者:  Cui, Yangguang;  Cao, Kun;  Zhou, Junlong;  Wei, Tongquan
收藏  |  浏览/下载：7/0  |  提交时间：2023/12/04
Training  Servers  Cloud computing  Delays  Costs  Computational modeling  Prototypes  Device frequency determination  federated learning (FL)  high efficiency  low cost  mobile-edge cloud computing (MECC)  user selection  
Practical Attacks on Deep Neural Networks by Memory Trojaning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 6, 页码: 1230-1243
作者:  Hu, Xing;  Zhao, Yang;  Deng, Lei;  Liang, Ling;  Zuo, Pengfei;  Ye, Jing;  Lin, Yingyan;  Xie, Yuan
收藏  |  浏览/下载：35/0  |  提交时间：2021/12/01
Trojan horses  Hardware  Integrated circuit modeling  Computational modeling  Security  Payloads  Convolutional neural networks (CNNs)  deep learning accelerator  deep learning attack  hardware Trojan  
Architecting Effectual Computation for Machine Learning Accelerators 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 10, 页码: 2654-2667
作者:  Lu, Hang;  Zhang, Mingzhe;  Han, Yinhe;  Wang, Qi;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：88/0  |  提交时间：2020/12/10
Computational modeling  Throughput  Adders  Machine learning  Acceleration  Kernel  Computational efficiency  Accelerator architectures  neural network hardware  multiplying circuits  
ParaML: A Polyvalent Multicore Accelerator for Machine Learning 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 9, 页码: 1764-1777
作者:  Zhou, Shengyuan;  Guo, Qi;  Du, Zidong;  Liu, Daofu;  Chen, Tianshi;  Li, Ling;  Liu, Shaoli;  Zhou, Jinhong;  Temam, Olivier;  Feng, Xiaobing;  Zhou, Xuehai;  Chen, Yunji
收藏  |  浏览/下载：50/0  |  提交时间：2020/12/10
Neural networks  Machine learning  Testing  Support vector machines  Linear regression  Computers  Computer architecture  Accelerator  machine learning (ML) techniques  multicore accelerator  
A Case of On-Chip Memory Subsystem Design for Low-Power CNN Accelerators 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 10, 页码: 1971-1984
作者:  Wang, Ying;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：68/0  |  提交时间：2019/12/10
Convolutional neural network (CNN)  deep learning  low power  memory subsystem