Embedded test decompressor to reduce the required channels and vector memory of tester for complex processor circuit

doi:10.1109/TVLSI.2007.893652

	Embedded test decompressor to reduce the required channels and vector memory of tester for complex processor circuit
	Han, Yinhe ; Hu, Yu ; Li, Xiaowei ; Li, Huawei ; Chandra, Anshuman
	2007-05-01
发表期刊	IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
ISSN	1063-8210
卷号	15 期号:5 页码:531-540
摘要	An embedded test stimulus decompressor is presented for the test patterns decompression, which can reduce the required channels and vector memory of automatic test equipment (ATE) for complex processor circuit. The proposed decompressor mainly consists of a periodically alterable MUX network which has multiple configurations to decode the input information flexibly and efficiently. In order to reduce the number of test patterns and configurations, a test patterns compaction algorithm, using CI-Graph merging, is proposed. With the proposed periodically alterable MUX network and the patterns compaction algorithm, smaller test data volume and required external pins can be achieved as compared to previous techniques.
关键词	automatic test equipment (ATE) Godson processor MUX network test stimulus decompression
DOI	10.1109/TVLSI.2007.893652
收录类别	SCI
语种	英语
WOS研究方向	Computer Science ; Engineering
WOS类目	Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS记录号	WOS:000246894500005
出版者	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
引用统计	被引频次：16[WOS] [WOS记录] [WOS相关记录]
文献类型	期刊论文
条目标识符	http://119.78.100.204/handle/2XEOYT63/11029
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Han, Yinhe
作者单位	1.Chinese Acad Sci, Inst Comp Technol, Key Lab Comp Syst & Architecture, Beijing 100080, Peoples R China 2.Synopsys Inc, Dept Res & Dev, Mountain View, CA 94043 USA
推荐引用方式 GB/T 7714	Han, Yinhe,Hu, Yu,Li, Xiaowei,et al. Embedded test decompressor to reduce the required channels and vector memory of tester for complex processor circuit[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,2007,15(5):531-540.
APA	Han, Yinhe,Hu, Yu,Li, Xiaowei,Li, Huawei,&Chandra, Anshuman.(2007).Embedded test decompressor to reduce the required channels and vector memory of tester for complex processor circuit.IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,15(5),531-540.
MLA	Han, Yinhe,et al."Embedded test decompressor to reduce the required channels and vector memory of tester for complex processor circuit".IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 15.5(2007):531-540.