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PDG: A Prefetcher for Dynamic Graph Updating 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 4, 页码: 1246-1259
作者:  Zhang, Xinmiao;  Liu, Cheng;  Ni, Jiacheng;  Cheng, Yuanqing;  Zhang, Lei;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载：3/0  |  提交时间：2024/05/20
Prefetching  Arrays  Optimization  Runtime  Heuristic algorithms  Computers  Monitoring  Computer architecture  data prefetching  memory system  
Cambricon-G: A Polyvalent Energy-Efficient Accelerator for Dynamic Graph Neural Networks 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 1, 页码: 116-128
作者:  Song, Xinkai;  Zhi, Tian;  Fan, Zhe;  Zhang, Zhenxing;  Zeng, Xi;  Li, Wei;  Hu, Xing;  Du, Zidong;  Guo, Qi;  Chen, Yunji
收藏  |  浏览/下载：29/0  |  提交时间：2022/06/21
Accelerator  architecture  graph neural networks (GNNs)  
A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 4, 页码: 803-815
作者:  Wu, Bi;  Dai, Pengcheng;  Cheng, Yuanqing;  Wang, Ying;  Yang, Jianlei;  Wang, Zhaohao;  Liu, Dijun;  Zhao, Weisheng
收藏  |  浏览/下载：52/0  |  提交时间：2020/12/10
System-on-chip  Computer architecture  Magnetic tunneling  Transistors  Switches  Thermal sensors  Organizations  Cache  data migration  low power  spin transfer torque magnetic memory (STT-MRAM)  thermal gradient  
A Low Overhead In-Network Data Compressor for the Memory Hierarchy of Chip Multiprocessors 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 卷号: 37, 期号: 6, 页码: 1265-1277
作者:  Wang, Ying;  Li, Huawei;  Han, Yinhe;  Li, Xiaowei
收藏  |  浏览/下载：67/0  |  提交时间：2019/12/10
Cache  chip multiprocessor (CMP)  compression  memory hierarchy  network-on-chip (NoC)