中国科学院计算技术研究所机构知识库

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	Re-Meltrix: A Reconfigurable Processing-in-Memory Architecture Based on RRAM and Function Synthesis 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2025, 卷号: 44, 期号: 9, 页码: 3409-3422 作者:  Long, Boyu;  Han, Yinhe;  Sun, Xian-He;  Chen, Xiaoming 收藏  |  浏览/下载：2/0  |  提交时间：2025/12/03 Logic  Computer architecture  Integrated circuit interconnections  Hardware  Routing  Circuits  Table lookup  Decoding  Performance evaluation  Logic gates  Processing in memory  resistive random-access memory (RRAM)  software-hardware co-design  ternary content-addressable memory (TCAM)
	Pyramid: Accelerating LLM Inference With Cross-Level Processing-in-Memory 期刊论文 IEEE COMPUTER ARCHITECTURE LETTERS, 2025, 卷号: 24, 期号: 1, 页码: 121-124 作者:  Yan, Liang;  Lu, Xiaoyang;  Chen, Xiaoming;  Han, Yinhe;  Sun, Xian-He 收藏  |  浏览/下载：10/0  |  提交时间：2025/06/25 Graphics processing units  Decoding  Computational modeling  Parallel processing  Systolic arrays  Computer architecture  Table lookup  Random access memory  Interpolation  Transformers  Large language models  Processing-in-memory
	Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators 期刊论文 IEEE DESIGN & TEST, 2024, 卷号: 41, 期号: 5, 页码: 46-54 作者:  Liu, Rui;  Li, Zerun;  Zhang, Xiaoyu;  Li, Wanqian;  Shen, Libo;  Tang, Rui;  Luo, Zhejian;  Chen, Xiaoming;  Han, Yinhe;  Tang, Minghua 收藏  |  浏览/下载：29/0  |  提交时间：2024/12/06 Computer architecture  Cryptography  Optimization  Table lookup  Hardware acceleration  Resource management  Space exploration  Computing-in-memory  electronic design automation  cryptographic algorithm  automatic generation
	Power and Area Efficient FPGA Building Blocks Based on Ferroelectric FETs 期刊论文 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019, 卷号: 66, 期号: 5, 页码: 1780-1793 作者:  Chen, Xiaoming;  Ni, Kai;  Niemier, Michael T.;  Han, Yinhe;  Datta, Suman;  Hu, Xiaobo Sharon 收藏  |  浏览/下载：129/0  |  提交时间：2019/08/16 Ferroelectric field-effect transistor (FeFET)  field-programmable gate array (FPGA)  lookup table (LUT)  routing switch